DPDK 23.11.2
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rte_ecpri.h
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1/* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2020 Mellanox Technologies, Ltd
3 */
4
5#ifndef _RTE_ECPRI_H_
6#define _RTE_ECPRI_H_
7
17#include <stdint.h>
18#include <rte_byteorder.h>
19
20#ifdef __cplusplus
21extern "C" {
22#endif
23
24/*
25 * eCPRI Protocol Revision 1.0, 1.1, 1.2, 2.0: 0001b
26 * Other values are reserved for future
27 */
28#define RTE_ECPRI_REV_UP_TO_20 1
29
30/*
31 * eCPRI message types in specifications
32 * IWF* types will only be supported from rev.2
33 * 12-63: Reserved for future revision
34 * 64-255: Vendor Specific
35 */
36#define RTE_ECPRI_MSG_TYPE_IQ_DATA 0
37#define RTE_ECPRI_MSG_TYPE_BIT_SEQ 1
38#define RTE_ECPRI_MSG_TYPE_RTC_CTRL 2
39#define RTE_ECPRI_MSG_TYPE_GEN_DATA 3
40#define RTE_ECPRI_MSG_TYPE_RM_ACC 4
41#define RTE_ECPRI_MSG_TYPE_DLY_MSR 5
42#define RTE_ECPRI_MSG_TYPE_RMT_RST 6
43#define RTE_ECPRI_MSG_TYPE_EVT_IND 7
44#define RTE_ECPRI_MSG_TYPE_IWF_UP 8
45#define RTE_ECPRI_MSG_TYPE_IWF_OPT 9
46#define RTE_ECPRI_MSG_TYPE_IWF_MAP 10
47#define RTE_ECPRI_MSG_TYPE_IWF_DCTRL 11
48
49/*
50 * Event Type of Message Type #7: Event Indication
51 * 0x00: Fault(s) Indication
52 * 0x01: Fault(s) Indication Acknowledge
53 * 0x02: Notification(s) Indication
54 * 0x03: Synchronization Request
55 * 0x04: Synchronization Acknowledge
56 * 0x05: Synchronization End Indication
57 * 0x06...0xFF: Reserved
58 */
59#define RTE_ECPRI_EVT_IND_FAULT_IND 0x00
60#define RTE_ECPRI_EVT_IND_FAULT_ACK 0x01
61#define RTE_ECPRI_EVT_IND_NTFY_IND 0x02
62#define RTE_ECPRI_EVT_IND_SYNC_REQ 0x03
63#define RTE_ECPRI_EVT_IND_SYNC_ACK 0x04
64#define RTE_ECPRI_EVT_IND_SYNC_END 0x05
65
70 union {
72 struct {
73#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
74 uint32_t size:16;
75 uint32_t type:8;
76 uint32_t c:1;
77 uint32_t res:3;
78 uint32_t revision:4;
79#elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN
80 uint32_t revision:4;
81 uint32_t res:3;
82 uint32_t c:1;
83 uint32_t type:8;
84 uint32_t size:16;
85#endif
86 };
87 };
88};
89
97
105
113
121
126#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
127 uint32_t ele_id:16;
128 uint32_t rr:4;
129 uint32_t rw:4;
130 uint32_t rma_id:8;
131#elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN
132 uint32_t rma_id:8;
133 uint32_t rw:4;
134 uint32_t rr:4;
135 uint32_t ele_id:16;
136#endif
137 uint8_t addr[6];
139};
140
145 uint8_t msr_id;
146 uint8_t act_type;
147};
148
156
161 uint8_t evt_id;
162 uint8_t evt_type;
163 uint8_t seq;
164 uint8_t number;
165};
166
171 struct rte_ecpri_common_hdr common;
172 union {
173 struct rte_ecpri_msg_iq_data type0;
174 struct rte_ecpri_msg_bit_seq type1;
175 struct rte_ecpri_msg_rtc_ctrl type2;
176 struct rte_ecpri_msg_gen_data type3;
177 struct rte_ecpri_msg_rm_access type4;
178 struct rte_ecpri_msg_delay_measure type5;
179 struct rte_ecpri_msg_remote_reset type6;
180 struct rte_ecpri_msg_event_ind type7;
181 rte_be32_t dummy[3];
182 };
183};
184
185#ifdef __cplusplus
186}
187#endif
188
189#endif /* _RTE_ECPRI_H_ */
uint32_t rte_be32_t
uint16_t rte_be16_t