DPDK  20.11.5
rte_ethdev.h
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1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2010-2017 Intel Corporation
3  */
4 
5 #ifndef _RTE_ETHDEV_H_
6 #define _RTE_ETHDEV_H_
7 
142 #ifdef __cplusplus
143 extern "C" {
144 #endif
145 
146 #include <stdint.h>
147 
148 /* Use this macro to check if LRO API is supported */
149 #define RTE_ETHDEV_HAS_LRO_SUPPORT
150 
151 #include <rte_compat.h>
152 #include <rte_log.h>
153 #include <rte_interrupts.h>
154 #include <rte_dev.h>
155 #include <rte_devargs.h>
156 #include <rte_errno.h>
157 #include <rte_common.h>
158 #include <rte_config.h>
159 #include <rte_ether.h>
160 
161 #include "rte_ethdev_trace_fp.h"
162 #include "rte_dev_info.h"
163 
164 extern int rte_eth_dev_logtype;
165 
166 #define RTE_ETHDEV_LOG(level, ...) \
167  rte_log(RTE_LOG_ ## level, rte_eth_dev_logtype, "" __VA_ARGS__)
168 
169 struct rte_mbuf;
170 
187 int rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs);
188 
203 uint16_t rte_eth_iterator_next(struct rte_dev_iterator *iter);
204 
217 void rte_eth_iterator_cleanup(struct rte_dev_iterator *iter);
218 
232 #define RTE_ETH_FOREACH_MATCHING_DEV(id, devargs, iter) \
233  for (rte_eth_iterator_init(iter, devargs), \
234  id = rte_eth_iterator_next(iter); \
235  id != RTE_MAX_ETHPORTS; \
236  id = rte_eth_iterator_next(iter))
237 
245  uint64_t ipackets;
246  uint64_t opackets;
247  uint64_t ibytes;
248  uint64_t obytes;
249  uint64_t imissed;
253  uint64_t ierrors;
254  uint64_t oerrors;
255  uint64_t rx_nombuf;
256  /* Queue stats are limited to max 256 queues */
257  uint64_t q_ipackets[RTE_ETHDEV_QUEUE_STAT_CNTRS];
259  uint64_t q_opackets[RTE_ETHDEV_QUEUE_STAT_CNTRS];
261  uint64_t q_ibytes[RTE_ETHDEV_QUEUE_STAT_CNTRS];
263  uint64_t q_obytes[RTE_ETHDEV_QUEUE_STAT_CNTRS];
265  uint64_t q_errors[RTE_ETHDEV_QUEUE_STAT_CNTRS];
267 };
268 
272 #define ETH_LINK_SPEED_AUTONEG (0 << 0)
273 #define ETH_LINK_SPEED_FIXED (1 << 0)
274 #define ETH_LINK_SPEED_10M_HD (1 << 1)
275 #define ETH_LINK_SPEED_10M (1 << 2)
276 #define ETH_LINK_SPEED_100M_HD (1 << 3)
277 #define ETH_LINK_SPEED_100M (1 << 4)
278 #define ETH_LINK_SPEED_1G (1 << 5)
279 #define ETH_LINK_SPEED_2_5G (1 << 6)
280 #define ETH_LINK_SPEED_5G (1 << 7)
281 #define ETH_LINK_SPEED_10G (1 << 8)
282 #define ETH_LINK_SPEED_20G (1 << 9)
283 #define ETH_LINK_SPEED_25G (1 << 10)
284 #define ETH_LINK_SPEED_40G (1 << 11)
285 #define ETH_LINK_SPEED_50G (1 << 12)
286 #define ETH_LINK_SPEED_56G (1 << 13)
287 #define ETH_LINK_SPEED_100G (1 << 14)
288 #define ETH_LINK_SPEED_200G (1 << 15)
293 #define ETH_SPEED_NUM_NONE 0
294 #define ETH_SPEED_NUM_10M 10
295 #define ETH_SPEED_NUM_100M 100
296 #define ETH_SPEED_NUM_1G 1000
297 #define ETH_SPEED_NUM_2_5G 2500
298 #define ETH_SPEED_NUM_5G 5000
299 #define ETH_SPEED_NUM_10G 10000
300 #define ETH_SPEED_NUM_20G 20000
301 #define ETH_SPEED_NUM_25G 25000
302 #define ETH_SPEED_NUM_40G 40000
303 #define ETH_SPEED_NUM_50G 50000
304 #define ETH_SPEED_NUM_56G 56000
305 #define ETH_SPEED_NUM_100G 100000
306 #define ETH_SPEED_NUM_200G 200000
307 #define ETH_SPEED_NUM_UNKNOWN UINT32_MAX
312 __extension__
313 struct rte_eth_link {
314  uint32_t link_speed;
315  uint16_t link_duplex : 1;
316  uint16_t link_autoneg : 1;
317  uint16_t link_status : 1;
318 } __rte_aligned(8);
320 /* Utility constants */
321 #define ETH_LINK_HALF_DUPLEX 0
322 #define ETH_LINK_FULL_DUPLEX 1
323 #define ETH_LINK_DOWN 0
324 #define ETH_LINK_UP 1
325 #define ETH_LINK_FIXED 0
326 #define ETH_LINK_AUTONEG 1
327 #define RTE_ETH_LINK_MAX_STR_LEN 40
333 struct rte_eth_thresh {
334  uint8_t pthresh;
335  uint8_t hthresh;
336  uint8_t wthresh;
337 };
338 
342 #define ETH_MQ_RX_RSS_FLAG 0x1
343 #define ETH_MQ_RX_DCB_FLAG 0x2
344 #define ETH_MQ_RX_VMDQ_FLAG 0x4
345 
353 
357  ETH_MQ_RX_DCB = ETH_MQ_RX_DCB_FLAG,
359  ETH_MQ_RX_DCB_RSS = ETH_MQ_RX_RSS_FLAG | ETH_MQ_RX_DCB_FLAG,
360 
362  ETH_MQ_RX_VMDQ_ONLY = ETH_MQ_RX_VMDQ_FLAG,
364  ETH_MQ_RX_VMDQ_RSS = ETH_MQ_RX_RSS_FLAG | ETH_MQ_RX_VMDQ_FLAG,
366  ETH_MQ_RX_VMDQ_DCB = ETH_MQ_RX_VMDQ_FLAG | ETH_MQ_RX_DCB_FLAG,
369  ETH_MQ_RX_VMDQ_FLAG,
370 };
371 
375 #define ETH_RSS ETH_MQ_RX_RSS
376 #define VMDQ_DCB ETH_MQ_RX_VMDQ_DCB
377 #define ETH_DCB_RX ETH_MQ_RX_DCB
378 
388 };
389 
393 #define ETH_DCB_NONE ETH_MQ_TX_NONE
394 #define ETH_VMDQ_DCB_TX ETH_MQ_TX_VMDQ_DCB
395 #define ETH_DCB_TX ETH_MQ_TX_DCB
396 
403  uint32_t max_rx_pkt_len;
406  uint16_t split_hdr_size;
412  uint64_t offloads;
413 
414  uint64_t reserved_64s[2];
415  void *reserved_ptrs[2];
416 };
417 
423  ETH_VLAN_TYPE_UNKNOWN = 0,
426  ETH_VLAN_TYPE_MAX,
427 };
428 
434  uint64_t ids[64];
435 };
436 
455  uint8_t *rss_key;
456  uint8_t rss_key_len;
457  uint64_t rss_hf;
458 };
459 
460 /*
461  * A packet can be identified by hardware as different flow types. Different
462  * NIC hardware may support different flow types.
463  * Basically, the NIC hardware identifies the flow type as deep protocol as
464  * possible, and exclusively. For example, if a packet is identified as
465  * 'RTE_ETH_FLOW_NONFRAG_IPV4_TCP', it will not be any of other flow types,
466  * though it is an actual IPV4 packet.
467  */
468 #define RTE_ETH_FLOW_UNKNOWN 0
469 #define RTE_ETH_FLOW_RAW 1
470 #define RTE_ETH_FLOW_IPV4 2
471 #define RTE_ETH_FLOW_FRAG_IPV4 3
472 #define RTE_ETH_FLOW_NONFRAG_IPV4_TCP 4
473 #define RTE_ETH_FLOW_NONFRAG_IPV4_UDP 5
474 #define RTE_ETH_FLOW_NONFRAG_IPV4_SCTP 6
475 #define RTE_ETH_FLOW_NONFRAG_IPV4_OTHER 7
476 #define RTE_ETH_FLOW_IPV6 8
477 #define RTE_ETH_FLOW_FRAG_IPV6 9
478 #define RTE_ETH_FLOW_NONFRAG_IPV6_TCP 10
479 #define RTE_ETH_FLOW_NONFRAG_IPV6_UDP 11
480 #define RTE_ETH_FLOW_NONFRAG_IPV6_SCTP 12
481 #define RTE_ETH_FLOW_NONFRAG_IPV6_OTHER 13
482 #define RTE_ETH_FLOW_L2_PAYLOAD 14
483 #define RTE_ETH_FLOW_IPV6_EX 15
484 #define RTE_ETH_FLOW_IPV6_TCP_EX 16
485 #define RTE_ETH_FLOW_IPV6_UDP_EX 17
486 #define RTE_ETH_FLOW_PORT 18
487 
488 #define RTE_ETH_FLOW_VXLAN 19
489 #define RTE_ETH_FLOW_GENEVE 20
490 #define RTE_ETH_FLOW_NVGRE 21
491 #define RTE_ETH_FLOW_VXLAN_GPE 22
492 #define RTE_ETH_FLOW_GTPU 23
493 #define RTE_ETH_FLOW_MAX 24
494 
495 /*
496  * Below macros are defined for RSS offload types, they can be used to
497  * fill rte_eth_rss_conf.rss_hf or rte_flow_action_rss.types.
498  */
499 #define ETH_RSS_IPV4 (1ULL << 2)
500 #define ETH_RSS_FRAG_IPV4 (1ULL << 3)
501 #define ETH_RSS_NONFRAG_IPV4_TCP (1ULL << 4)
502 #define ETH_RSS_NONFRAG_IPV4_UDP (1ULL << 5)
503 #define ETH_RSS_NONFRAG_IPV4_SCTP (1ULL << 6)
504 #define ETH_RSS_NONFRAG_IPV4_OTHER (1ULL << 7)
505 #define ETH_RSS_IPV6 (1ULL << 8)
506 #define ETH_RSS_FRAG_IPV6 (1ULL << 9)
507 #define ETH_RSS_NONFRAG_IPV6_TCP (1ULL << 10)
508 #define ETH_RSS_NONFRAG_IPV6_UDP (1ULL << 11)
509 #define ETH_RSS_NONFRAG_IPV6_SCTP (1ULL << 12)
510 #define ETH_RSS_NONFRAG_IPV6_OTHER (1ULL << 13)
511 #define ETH_RSS_L2_PAYLOAD (1ULL << 14)
512 #define ETH_RSS_IPV6_EX (1ULL << 15)
513 #define ETH_RSS_IPV6_TCP_EX (1ULL << 16)
514 #define ETH_RSS_IPV6_UDP_EX (1ULL << 17)
515 #define ETH_RSS_PORT (1ULL << 18)
516 #define ETH_RSS_VXLAN (1ULL << 19)
517 #define ETH_RSS_GENEVE (1ULL << 20)
518 #define ETH_RSS_NVGRE (1ULL << 21)
519 #define ETH_RSS_GTPU (1ULL << 23)
520 #define ETH_RSS_ETH (1ULL << 24)
521 #define ETH_RSS_S_VLAN (1ULL << 25)
522 #define ETH_RSS_C_VLAN (1ULL << 26)
523 #define ETH_RSS_ESP (1ULL << 27)
524 #define ETH_RSS_AH (1ULL << 28)
525 #define ETH_RSS_L2TPV3 (1ULL << 29)
526 #define ETH_RSS_PFCP (1ULL << 30)
527 #define ETH_RSS_PPPOE (1ULL << 31)
528 #define ETH_RSS_ECPRI (1ULL << 32)
529 
530 /*
531  * We use the following macros to combine with above ETH_RSS_* for
532  * more specific input set selection. These bits are defined starting
533  * from the high end of the 64 bits.
534  * Note: If we use above ETH_RSS_* without SRC/DST_ONLY, it represents
535  * both SRC and DST are taken into account. If SRC_ONLY and DST_ONLY of
536  * the same level are used simultaneously, it is the same case as none of
537  * them are added.
538  */
539 #define ETH_RSS_L3_SRC_ONLY (1ULL << 63)
540 #define ETH_RSS_L3_DST_ONLY (1ULL << 62)
541 #define ETH_RSS_L4_SRC_ONLY (1ULL << 61)
542 #define ETH_RSS_L4_DST_ONLY (1ULL << 60)
543 #define ETH_RSS_L2_SRC_ONLY (1ULL << 59)
544 #define ETH_RSS_L2_DST_ONLY (1ULL << 58)
545 
546 /*
547  * Only select IPV6 address prefix as RSS input set according to
548  * https://tools.ietf.org/html/rfc6052
549  * Must be combined with ETH_RSS_IPV6, ETH_RSS_NONFRAG_IPV6_UDP,
550  * ETH_RSS_NONFRAG_IPV6_TCP, ETH_RSS_NONFRAG_IPV6_SCTP.
551  */
552 #define RTE_ETH_RSS_L3_PRE32 (1ULL << 57)
553 #define RTE_ETH_RSS_L3_PRE40 (1ULL << 56)
554 #define RTE_ETH_RSS_L3_PRE48 (1ULL << 55)
555 #define RTE_ETH_RSS_L3_PRE56 (1ULL << 54)
556 #define RTE_ETH_RSS_L3_PRE64 (1ULL << 53)
557 #define RTE_ETH_RSS_L3_PRE96 (1ULL << 52)
558 
559 /*
560  * Use the following macros to combine with the above layers
561  * to choose inner and outer layers or both for RSS computation.
562  * Bits 50 and 51 are reserved for this.
563  */
564 
572 #define ETH_RSS_LEVEL_PMD_DEFAULT (0ULL << 50)
573 
578 #define ETH_RSS_LEVEL_OUTERMOST (1ULL << 50)
579 
584 #define ETH_RSS_LEVEL_INNERMOST (2ULL << 50)
585 #define ETH_RSS_LEVEL_MASK (3ULL << 50)
586 
587 #define ETH_RSS_LEVEL(rss_hf) ((rss_hf & ETH_RSS_LEVEL_MASK) >> 50)
588 
599 static inline uint64_t
600 rte_eth_rss_hf_refine(uint64_t rss_hf)
601 {
602  if ((rss_hf & ETH_RSS_L3_SRC_ONLY) && (rss_hf & ETH_RSS_L3_DST_ONLY))
603  rss_hf &= ~(ETH_RSS_L3_SRC_ONLY | ETH_RSS_L3_DST_ONLY);
604 
605  if ((rss_hf & ETH_RSS_L4_SRC_ONLY) && (rss_hf & ETH_RSS_L4_DST_ONLY))
606  rss_hf &= ~(ETH_RSS_L4_SRC_ONLY | ETH_RSS_L4_DST_ONLY);
607 
608  return rss_hf;
609 }
610 
611 #define ETH_RSS_IPV6_PRE32 ( \
612  ETH_RSS_IPV6 | \
613  RTE_ETH_RSS_L3_PRE32)
614 
615 #define ETH_RSS_IPV6_PRE40 ( \
616  ETH_RSS_IPV6 | \
617  RTE_ETH_RSS_L3_PRE40)
618 
619 #define ETH_RSS_IPV6_PRE48 ( \
620  ETH_RSS_IPV6 | \
621  RTE_ETH_RSS_L3_PRE48)
622 
623 #define ETH_RSS_IPV6_PRE56 ( \
624  ETH_RSS_IPV6 | \
625  RTE_ETH_RSS_L3_PRE56)
626 
627 #define ETH_RSS_IPV6_PRE64 ( \
628  ETH_RSS_IPV6 | \
629  RTE_ETH_RSS_L3_PRE64)
630 
631 #define ETH_RSS_IPV6_PRE96 ( \
632  ETH_RSS_IPV6 | \
633  RTE_ETH_RSS_L3_PRE96)
634 
635 #define ETH_RSS_IPV6_PRE32_UDP ( \
636  ETH_RSS_NONFRAG_IPV6_UDP | \
637  RTE_ETH_RSS_L3_PRE32)
638 
639 #define ETH_RSS_IPV6_PRE40_UDP ( \
640  ETH_RSS_NONFRAG_IPV6_UDP | \
641  RTE_ETH_RSS_L3_PRE40)
642 
643 #define ETH_RSS_IPV6_PRE48_UDP ( \
644  ETH_RSS_NONFRAG_IPV6_UDP | \
645  RTE_ETH_RSS_L3_PRE48)
646 
647 #define ETH_RSS_IPV6_PRE56_UDP ( \
648  ETH_RSS_NONFRAG_IPV6_UDP | \
649  RTE_ETH_RSS_L3_PRE56)
650 
651 #define ETH_RSS_IPV6_PRE64_UDP ( \
652  ETH_RSS_NONFRAG_IPV6_UDP | \
653  RTE_ETH_RSS_L3_PRE64)
654 
655 #define ETH_RSS_IPV6_PRE96_UDP ( \
656  ETH_RSS_NONFRAG_IPV6_UDP | \
657  RTE_ETH_RSS_L3_PRE96)
658 
659 #define ETH_RSS_IPV6_PRE32_TCP ( \
660  ETH_RSS_NONFRAG_IPV6_TCP | \
661  RTE_ETH_RSS_L3_PRE32)
662 
663 #define ETH_RSS_IPV6_PRE40_TCP ( \
664  ETH_RSS_NONFRAG_IPV6_TCP | \
665  RTE_ETH_RSS_L3_PRE40)
666 
667 #define ETH_RSS_IPV6_PRE48_TCP ( \
668  ETH_RSS_NONFRAG_IPV6_TCP | \
669  RTE_ETH_RSS_L3_PRE48)
670 
671 #define ETH_RSS_IPV6_PRE56_TCP ( \
672  ETH_RSS_NONFRAG_IPV6_TCP | \
673  RTE_ETH_RSS_L3_PRE56)
674 
675 #define ETH_RSS_IPV6_PRE64_TCP ( \
676  ETH_RSS_NONFRAG_IPV6_TCP | \
677  RTE_ETH_RSS_L3_PRE64)
678 
679 #define ETH_RSS_IPV6_PRE96_TCP ( \
680  ETH_RSS_NONFRAG_IPV6_TCP | \
681  RTE_ETH_RSS_L3_PRE96)
682 
683 #define ETH_RSS_IPV6_PRE32_SCTP ( \
684  ETH_RSS_NONFRAG_IPV6_SCTP | \
685  RTE_ETH_RSS_L3_PRE32)
686 
687 #define ETH_RSS_IPV6_PRE40_SCTP ( \
688  ETH_RSS_NONFRAG_IPV6_SCTP | \
689  RTE_ETH_RSS_L3_PRE40)
690 
691 #define ETH_RSS_IPV6_PRE48_SCTP ( \
692  ETH_RSS_NONFRAG_IPV6_SCTP | \
693  RTE_ETH_RSS_L3_PRE48)
694 
695 #define ETH_RSS_IPV6_PRE56_SCTP ( \
696  ETH_RSS_NONFRAG_IPV6_SCTP | \
697  RTE_ETH_RSS_L3_PRE56)
698 
699 #define ETH_RSS_IPV6_PRE64_SCTP ( \
700  ETH_RSS_NONFRAG_IPV6_SCTP | \
701  RTE_ETH_RSS_L3_PRE64)
702 
703 #define ETH_RSS_IPV6_PRE96_SCTP ( \
704  ETH_RSS_NONFRAG_IPV6_SCTP | \
705  RTE_ETH_RSS_L3_PRE96)
706 
707 #define ETH_RSS_IP ( \
708  ETH_RSS_IPV4 | \
709  ETH_RSS_FRAG_IPV4 | \
710  ETH_RSS_NONFRAG_IPV4_OTHER | \
711  ETH_RSS_IPV6 | \
712  ETH_RSS_FRAG_IPV6 | \
713  ETH_RSS_NONFRAG_IPV6_OTHER | \
714  ETH_RSS_IPV6_EX)
715 
716 #define ETH_RSS_UDP ( \
717  ETH_RSS_NONFRAG_IPV4_UDP | \
718  ETH_RSS_NONFRAG_IPV6_UDP | \
719  ETH_RSS_IPV6_UDP_EX)
720 
721 #define ETH_RSS_TCP ( \
722  ETH_RSS_NONFRAG_IPV4_TCP | \
723  ETH_RSS_NONFRAG_IPV6_TCP | \
724  ETH_RSS_IPV6_TCP_EX)
725 
726 #define ETH_RSS_SCTP ( \
727  ETH_RSS_NONFRAG_IPV4_SCTP | \
728  ETH_RSS_NONFRAG_IPV6_SCTP)
729 
730 #define ETH_RSS_TUNNEL ( \
731  ETH_RSS_VXLAN | \
732  ETH_RSS_GENEVE | \
733  ETH_RSS_NVGRE)
734 
735 #define ETH_RSS_VLAN ( \
736  ETH_RSS_S_VLAN | \
737  ETH_RSS_C_VLAN)
738 
740 #define ETH_RSS_PROTO_MASK ( \
741  ETH_RSS_IPV4 | \
742  ETH_RSS_FRAG_IPV4 | \
743  ETH_RSS_NONFRAG_IPV4_TCP | \
744  ETH_RSS_NONFRAG_IPV4_UDP | \
745  ETH_RSS_NONFRAG_IPV4_SCTP | \
746  ETH_RSS_NONFRAG_IPV4_OTHER | \
747  ETH_RSS_IPV6 | \
748  ETH_RSS_FRAG_IPV6 | \
749  ETH_RSS_NONFRAG_IPV6_TCP | \
750  ETH_RSS_NONFRAG_IPV6_UDP | \
751  ETH_RSS_NONFRAG_IPV6_SCTP | \
752  ETH_RSS_NONFRAG_IPV6_OTHER | \
753  ETH_RSS_L2_PAYLOAD | \
754  ETH_RSS_IPV6_EX | \
755  ETH_RSS_IPV6_TCP_EX | \
756  ETH_RSS_IPV6_UDP_EX | \
757  ETH_RSS_PORT | \
758  ETH_RSS_VXLAN | \
759  ETH_RSS_GENEVE | \
760  ETH_RSS_NVGRE)
761 
762 /*
763  * Definitions used for redirection table entry size.
764  * Some RSS RETA sizes may not be supported by some drivers, check the
765  * documentation or the description of relevant functions for more details.
766  */
767 #define ETH_RSS_RETA_SIZE_64 64
768 #define ETH_RSS_RETA_SIZE_128 128
769 #define ETH_RSS_RETA_SIZE_256 256
770 #define ETH_RSS_RETA_SIZE_512 512
771 #define RTE_RETA_GROUP_SIZE 64
772 
773 /* Definitions used for VMDQ and DCB functionality */
774 #define ETH_VMDQ_MAX_VLAN_FILTERS 64
775 #define ETH_DCB_NUM_USER_PRIORITIES 8
776 #define ETH_VMDQ_DCB_NUM_QUEUES 128
777 #define ETH_DCB_NUM_QUEUES 128
779 /* DCB capability defines */
780 #define ETH_DCB_PG_SUPPORT 0x00000001
781 #define ETH_DCB_PFC_SUPPORT 0x00000002
783 /* Definitions used for VLAN Offload functionality */
784 #define ETH_VLAN_STRIP_OFFLOAD 0x0001
785 #define ETH_VLAN_FILTER_OFFLOAD 0x0002
786 #define ETH_VLAN_EXTEND_OFFLOAD 0x0004
787 #define ETH_QINQ_STRIP_OFFLOAD 0x0008
789 /* Definitions used for mask VLAN setting */
790 #define ETH_VLAN_STRIP_MASK 0x0001
791 #define ETH_VLAN_FILTER_MASK 0x0002
792 #define ETH_VLAN_EXTEND_MASK 0x0004
793 #define ETH_QINQ_STRIP_MASK 0x0008
794 #define ETH_VLAN_ID_MAX 0x0FFF
796 /* Definitions used for receive MAC address */
797 #define ETH_NUM_RECEIVE_MAC_ADDR 128
799 /* Definitions used for unicast hash */
800 #define ETH_VMDQ_NUM_UC_HASH_ARRAY 128
802 /* Definitions used for VMDQ pool rx mode setting */
803 #define ETH_VMDQ_ACCEPT_UNTAG 0x0001
804 #define ETH_VMDQ_ACCEPT_HASH_MC 0x0002
805 #define ETH_VMDQ_ACCEPT_HASH_UC 0x0004
806 #define ETH_VMDQ_ACCEPT_BROADCAST 0x0008
807 #define ETH_VMDQ_ACCEPT_MULTICAST 0x0010
810 #define ETH_MIRROR_MAX_VLANS 64
811 
812 #define ETH_MIRROR_VIRTUAL_POOL_UP 0x01
813 #define ETH_MIRROR_UPLINK_PORT 0x02
814 #define ETH_MIRROR_DOWNLINK_PORT 0x04
815 #define ETH_MIRROR_VLAN 0x08
816 #define ETH_MIRROR_VIRTUAL_POOL_DOWN 0x10
821 struct rte_eth_vlan_mirror {
822  uint64_t vlan_mask;
824  uint16_t vlan_id[ETH_MIRROR_MAX_VLANS];
825 };
826 
831  uint8_t rule_type;
832  uint8_t dst_pool;
833  uint64_t pool_mask;
836 };
837 
845  uint64_t mask;
847  uint16_t reta[RTE_RETA_GROUP_SIZE];
849 };
850 
856  ETH_4_TCS = 4,
858 };
859 
869 };
870 
871 /* This structure may be extended in future. */
872 struct rte_eth_dcb_rx_conf {
873  enum rte_eth_nb_tcs nb_tcs;
875  uint8_t dcb_tc[ETH_DCB_NUM_USER_PRIORITIES];
876 };
877 
878 struct rte_eth_vmdq_dcb_tx_conf {
879  enum rte_eth_nb_pools nb_queue_pools;
881  uint8_t dcb_tc[ETH_DCB_NUM_USER_PRIORITIES];
882 };
883 
884 struct rte_eth_dcb_tx_conf {
885  enum rte_eth_nb_tcs nb_tcs;
887  uint8_t dcb_tc[ETH_DCB_NUM_USER_PRIORITIES];
888 };
889 
890 struct rte_eth_vmdq_tx_conf {
891  enum rte_eth_nb_pools nb_queue_pools;
892 };
893 
908  uint8_t default_pool;
909  uint8_t nb_pool_maps;
910  struct {
911  uint16_t vlan_id;
912  uint64_t pools;
916 };
917 
939  uint8_t default_pool;
941  uint8_t nb_pool_maps;
942  uint32_t rx_mode;
943  struct {
944  uint16_t vlan_id;
945  uint64_t pools;
947 };
948 
959  uint64_t offloads;
960 
961  uint16_t pvid;
962  __extension__
963  uint8_t hw_vlan_reject_tagged : 1,
970  uint64_t reserved_64s[2];
971  void *reserved_ptrs[2];
972 };
973 
1011  struct rte_mempool *mp;
1012  uint16_t length;
1013  uint16_t offset;
1014  uint32_t reserved;
1015 };
1016 
1024  /* The settings for buffer split offload. */
1025  struct rte_eth_rxseg_split split;
1026  /* The other features settings should be added here. */
1027 };
1028 
1034  uint16_t rx_free_thresh;
1035  uint8_t rx_drop_en;
1037  uint16_t rx_nseg;
1043  uint64_t offloads;
1052 
1053  uint64_t reserved_64s[2];
1054  void *reserved_ptrs[2];
1055 };
1056 
1062  uint16_t tx_rs_thresh;
1063  uint16_t tx_free_thresh;
1072  uint64_t offloads;
1073 
1074  uint64_t reserved_64s[2];
1075  void *reserved_ptrs[2];
1076 };
1077 
1086  uint16_t max_nb_queues;
1088  uint16_t max_rx_2_tx;
1090  uint16_t max_tx_2_rx;
1091  uint16_t max_nb_desc;
1092 };
1093 
1094 #define RTE_ETH_MAX_HAIRPIN_PEERS 32
1095 
1103  uint16_t port;
1104  uint16_t queue;
1105 };
1106 
1114  uint32_t peer_count:16;
1125  uint32_t tx_explicit:1;
1126 
1138  uint32_t manual_bind:1;
1139  uint32_t reserved:14;
1140  struct rte_eth_hairpin_peer peers[RTE_ETH_MAX_HAIRPIN_PEERS];
1141 };
1142 
1147  uint16_t nb_max;
1148  uint16_t nb_min;
1149  uint16_t nb_align;
1159  uint16_t nb_seg_max;
1160 
1172  uint16_t nb_mtu_seg_max;
1173 };
1174 
1183 };
1184 
1191  uint32_t high_water;
1192  uint32_t low_water;
1193  uint16_t pause_time;
1194  uint16_t send_xon;
1197  uint8_t autoneg;
1198 };
1199 
1207  uint8_t priority;
1208 };
1209 
1214  RTE_TUNNEL_TYPE_NONE = 0,
1215  RTE_TUNNEL_TYPE_VXLAN,
1216  RTE_TUNNEL_TYPE_GENEVE,
1217  RTE_TUNNEL_TYPE_TEREDO,
1218  RTE_TUNNEL_TYPE_NVGRE,
1219  RTE_TUNNEL_TYPE_IP_IN_GRE,
1220  RTE_L2_TUNNEL_TYPE_E_TAG,
1221  RTE_TUNNEL_TYPE_VXLAN_GPE,
1222  RTE_TUNNEL_TYPE_MAX,
1223 };
1224 
1225 /* Deprecated API file for rte_eth_dev_filter_* functions */
1226 #include "rte_eth_ctrl.h"
1227 
1236 };
1237 
1245 };
1246 
1258  uint8_t drop_queue;
1259  struct rte_eth_fdir_masks mask;
1262 };
1263 
1272  uint16_t udp_port;
1273  uint8_t prot_type;
1274 };
1275 
1281  uint32_t lsc:1;
1283  uint32_t rxq:1;
1285  uint32_t rmv:1;
1286 };
1287 
1294  uint32_t link_speeds;
1303  uint32_t lpbk_mode;
1308  struct {
1312  struct rte_eth_dcb_rx_conf dcb_rx_conf;
1316  } rx_adv_conf;
1317  union {
1318  struct rte_eth_vmdq_dcb_tx_conf vmdq_dcb_tx_conf;
1320  struct rte_eth_dcb_tx_conf dcb_tx_conf;
1322  struct rte_eth_vmdq_tx_conf vmdq_tx_conf;
1324  } tx_adv_conf;
1330 };
1331 
1335 #define DEV_RX_OFFLOAD_VLAN_STRIP 0x00000001
1336 #define DEV_RX_OFFLOAD_IPV4_CKSUM 0x00000002
1337 #define DEV_RX_OFFLOAD_UDP_CKSUM 0x00000004
1338 #define DEV_RX_OFFLOAD_TCP_CKSUM 0x00000008
1339 #define DEV_RX_OFFLOAD_TCP_LRO 0x00000010
1340 #define DEV_RX_OFFLOAD_QINQ_STRIP 0x00000020
1341 #define DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM 0x00000040
1342 #define DEV_RX_OFFLOAD_MACSEC_STRIP 0x00000080
1343 #define DEV_RX_OFFLOAD_HEADER_SPLIT 0x00000100
1344 #define DEV_RX_OFFLOAD_VLAN_FILTER 0x00000200
1345 #define DEV_RX_OFFLOAD_VLAN_EXTEND 0x00000400
1346 #define DEV_RX_OFFLOAD_JUMBO_FRAME 0x00000800
1347 #define DEV_RX_OFFLOAD_SCATTER 0x00002000
1348 
1353 #define DEV_RX_OFFLOAD_TIMESTAMP 0x00004000
1354 #define DEV_RX_OFFLOAD_SECURITY 0x00008000
1355 #define DEV_RX_OFFLOAD_KEEP_CRC 0x00010000
1356 #define DEV_RX_OFFLOAD_SCTP_CKSUM 0x00020000
1357 #define DEV_RX_OFFLOAD_OUTER_UDP_CKSUM 0x00040000
1358 #define DEV_RX_OFFLOAD_RSS_HASH 0x00080000
1359 #define RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT 0x00100000
1360 
1361 #define DEV_RX_OFFLOAD_CHECKSUM (DEV_RX_OFFLOAD_IPV4_CKSUM | \
1362  DEV_RX_OFFLOAD_UDP_CKSUM | \
1363  DEV_RX_OFFLOAD_TCP_CKSUM)
1364 #define DEV_RX_OFFLOAD_VLAN (DEV_RX_OFFLOAD_VLAN_STRIP | \
1365  DEV_RX_OFFLOAD_VLAN_FILTER | \
1366  DEV_RX_OFFLOAD_VLAN_EXTEND | \
1367  DEV_RX_OFFLOAD_QINQ_STRIP)
1368 
1369 /*
1370  * If new Rx offload capabilities are defined, they also must be
1371  * mentioned in rte_rx_offload_names in rte_ethdev.c file.
1372  */
1373 
1377 #define DEV_TX_OFFLOAD_VLAN_INSERT 0x00000001
1378 #define DEV_TX_OFFLOAD_IPV4_CKSUM 0x00000002
1379 #define DEV_TX_OFFLOAD_UDP_CKSUM 0x00000004
1380 #define DEV_TX_OFFLOAD_TCP_CKSUM 0x00000008
1381 #define DEV_TX_OFFLOAD_SCTP_CKSUM 0x00000010
1382 #define DEV_TX_OFFLOAD_TCP_TSO 0x00000020
1383 #define DEV_TX_OFFLOAD_UDP_TSO 0x00000040
1384 #define DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM 0x00000080
1385 #define DEV_TX_OFFLOAD_QINQ_INSERT 0x00000100
1386 #define DEV_TX_OFFLOAD_VXLAN_TNL_TSO 0x00000200
1387 #define DEV_TX_OFFLOAD_GRE_TNL_TSO 0x00000400
1388 #define DEV_TX_OFFLOAD_IPIP_TNL_TSO 0x00000800
1389 #define DEV_TX_OFFLOAD_GENEVE_TNL_TSO 0x00001000
1390 #define DEV_TX_OFFLOAD_MACSEC_INSERT 0x00002000
1391 #define DEV_TX_OFFLOAD_MT_LOCKFREE 0x00004000
1392 
1395 #define DEV_TX_OFFLOAD_MULTI_SEGS 0x00008000
1396 
1397 #define DEV_TX_OFFLOAD_MBUF_FAST_FREE 0x00010000
1398 
1402 #define DEV_TX_OFFLOAD_SECURITY 0x00020000
1403 
1408 #define DEV_TX_OFFLOAD_UDP_TNL_TSO 0x00040000
1409 
1414 #define DEV_TX_OFFLOAD_IP_TNL_TSO 0x00080000
1415 
1416 #define DEV_TX_OFFLOAD_OUTER_UDP_CKSUM 0x00100000
1417 
1422 #define DEV_TX_OFFLOAD_SEND_ON_TIMESTAMP 0x00200000
1423 /*
1424  * If new Tx offload capabilities are defined, they also must be
1425  * mentioned in rte_tx_offload_names in rte_ethdev.c file.
1426  */
1427 
1432 #define RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP 0x00000001
1433 
1434 #define RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP 0x00000002
1435 
1437 /*
1438  * Fallback default preferred Rx/Tx port parameters.
1439  * These are used if an application requests default parameters
1440  * but the PMD does not provide preferred values.
1441  */
1442 #define RTE_ETH_DEV_FALLBACK_RX_RINGSIZE 512
1443 #define RTE_ETH_DEV_FALLBACK_TX_RINGSIZE 512
1444 #define RTE_ETH_DEV_FALLBACK_RX_NBQUEUES 1
1445 #define RTE_ETH_DEV_FALLBACK_TX_NBQUEUES 1
1446 
1453  uint16_t burst_size;
1454  uint16_t ring_size;
1455  uint16_t nb_queues;
1456 };
1457 
1462 #define RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID (UINT16_MAX)
1463 
1468  const char *name;
1469  uint16_t domain_id;
1470  uint16_t port_id;
1478 };
1479 
1487  __extension__
1488  uint32_t multi_pools:1;
1489  uint32_t offset_allowed:1;
1490  uint32_t offset_align_log2:4;
1491  uint16_t max_nseg;
1492  uint16_t reserved;
1493 };
1494 
1505  struct rte_device *device;
1506  const char *driver_name;
1507  unsigned int if_index;
1509  uint16_t min_mtu;
1510  uint16_t max_mtu;
1511  const uint32_t *dev_flags;
1512  uint32_t min_rx_bufsize;
1513  uint32_t max_rx_pktlen;
1516  uint16_t max_rx_queues;
1517  uint16_t max_tx_queues;
1518  uint32_t max_mac_addrs;
1521  uint16_t max_vfs;
1522  uint16_t max_vmdq_pools;
1532  uint16_t reta_size;
1534  uint8_t hash_key_size;
1539  uint16_t vmdq_queue_base;
1540  uint16_t vmdq_queue_num;
1541  uint16_t vmdq_pool_base;
1544  uint32_t speed_capa;
1546  uint16_t nb_rx_queues;
1547  uint16_t nb_tx_queues;
1553  uint64_t dev_capa;
1559 
1560  uint64_t reserved_64s[2];
1561  void *reserved_ptrs[2];
1562 };
1563 
1569  struct rte_mempool *mp;
1571  uint8_t scattered_rx;
1572  uint16_t nb_desc;
1573  uint16_t rx_buf_size;
1575 
1582  uint16_t nb_desc;
1584 
1585 /* Generic Burst mode flag definition, values can be ORed. */
1586 
1592 #define RTE_ETH_BURST_FLAG_PER_QUEUE (1ULL << 0)
1593 
1599  uint64_t flags;
1601 #define RTE_ETH_BURST_MODE_INFO_SIZE 1024
1602  char info[RTE_ETH_BURST_MODE_INFO_SIZE];
1603 };
1604 
1606 #define RTE_ETH_XSTATS_NAME_SIZE 64
1607 
1618  uint64_t id;
1619  uint64_t value;
1620 };
1621 
1638 };
1639 
1640 #define ETH_DCB_NUM_TCS 8
1641 #define ETH_MAX_VMDQ_POOL 64
1642 
1649  struct {
1650  uint16_t base;
1651  uint16_t nb_queue;
1652  } tc_rxq[ETH_MAX_VMDQ_POOL][ETH_DCB_NUM_TCS];
1654  struct {
1655  uint16_t base;
1656  uint16_t nb_queue;
1657  } tc_txq[ETH_MAX_VMDQ_POOL][ETH_DCB_NUM_TCS];
1658 };
1659 
1665  uint8_t nb_tcs;
1666  uint8_t prio_tc[ETH_DCB_NUM_USER_PRIORITIES];
1667  uint8_t tc_bws[ETH_DCB_NUM_TCS];
1670 };
1671 
1681 };
1682 
1683 /* Translate from FEC mode to FEC capa */
1684 #define RTE_ETH_FEC_MODE_TO_CAPA(x) (1U << (x))
1685 
1686 /* This macro indicates FEC capa mask */
1687 #define RTE_ETH_FEC_MODE_CAPA_MASK(x) (1U << (RTE_ETH_FEC_ ## x))
1688 
1689 /* A structure used to get capabilities per link speed */
1690 struct rte_eth_fec_capa {
1691  uint32_t speed;
1692  uint32_t capa;
1693 };
1694 
1695 #define RTE_ETH_ALL RTE_MAX_ETHPORTS
1696 
1697 /* Macros to check for valid port */
1698 #define RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, retval) do { \
1699  if (!rte_eth_dev_is_valid_port(port_id)) { \
1700  RTE_ETHDEV_LOG(ERR, "Invalid port_id=%u\n", port_id); \
1701  return retval; \
1702  } \
1703 } while (0)
1704 
1705 #define RTE_ETH_VALID_PORTID_OR_RET(port_id) do { \
1706  if (!rte_eth_dev_is_valid_port(port_id)) { \
1707  RTE_ETHDEV_LOG(ERR, "Invalid port_id=%u\n", port_id); \
1708  return; \
1709  } \
1710 } while (0)
1711 
1717 #define ETH_L2_TUNNEL_ENABLE_MASK 0x00000001
1718 
1719 #define ETH_L2_TUNNEL_INSERTION_MASK 0x00000002
1720 
1721 #define ETH_L2_TUNNEL_STRIPPING_MASK 0x00000004
1722 
1723 #define ETH_L2_TUNNEL_FORWARDING_MASK 0x00000008
1724 
1747 typedef uint16_t (*rte_rx_callback_fn)(uint16_t port_id, uint16_t queue,
1748  struct rte_mbuf *pkts[], uint16_t nb_pkts, uint16_t max_pkts,
1749  void *user_param);
1750 
1771 typedef uint16_t (*rte_tx_callback_fn)(uint16_t port_id, uint16_t queue,
1772  struct rte_mbuf *pkts[], uint16_t nb_pkts, void *user_param);
1773 
1784 };
1785 
1786 struct rte_eth_dev_sriov {
1787  uint8_t active;
1788  uint8_t nb_q_per_pool;
1789  uint16_t def_vmdq_idx;
1790  uint16_t def_pool_q_idx;
1791 };
1792 #define RTE_ETH_DEV_SRIOV(dev) ((dev)->data->sriov)
1793 
1794 #define RTE_ETH_NAME_MAX_LEN RTE_DEV_NAME_MAX_LEN
1795 
1796 #define RTE_ETH_DEV_NO_OWNER 0
1797 
1798 #define RTE_ETH_MAX_OWNER_NAME_LEN 64
1799 
1800 struct rte_eth_dev_owner {
1801  uint64_t id;
1802  char name[RTE_ETH_MAX_OWNER_NAME_LEN];
1803 };
1804 
1806 #define RTE_ETH_DEV_FLOW_OPS_THREAD_SAFE 0x0001
1807 
1808 #define RTE_ETH_DEV_INTR_LSC 0x0002
1809 
1810 #define RTE_ETH_DEV_BONDED_SLAVE 0x0004
1811 
1812 #define RTE_ETH_DEV_INTR_RMV 0x0008
1813 
1814 #define RTE_ETH_DEV_REPRESENTOR 0x0010
1815 
1816 #define RTE_ETH_DEV_NOLIVE_MAC_ADDR 0x0020
1817 
1821 #define RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS 0x0040
1822 
1834 uint64_t rte_eth_find_next_owned_by(uint16_t port_id,
1835  const uint64_t owner_id);
1836 
1840 #define RTE_ETH_FOREACH_DEV_OWNED_BY(p, o) \
1841  for (p = rte_eth_find_next_owned_by(0, o); \
1842  (unsigned int)p < (unsigned int)RTE_MAX_ETHPORTS; \
1843  p = rte_eth_find_next_owned_by(p + 1, o))
1844 
1853 uint16_t rte_eth_find_next(uint16_t port_id);
1854 
1858 #define RTE_ETH_FOREACH_DEV(p) \
1859  RTE_ETH_FOREACH_DEV_OWNED_BY(p, RTE_ETH_DEV_NO_OWNER)
1860 
1875 __rte_experimental
1876 uint16_t
1877 rte_eth_find_next_of(uint16_t port_id_start,
1878  const struct rte_device *parent);
1879 
1888 #define RTE_ETH_FOREACH_DEV_OF(port_id, parent) \
1889  for (port_id = rte_eth_find_next_of(0, parent); \
1890  port_id < RTE_MAX_ETHPORTS; \
1891  port_id = rte_eth_find_next_of(port_id + 1, parent))
1892 
1907 __rte_experimental
1908 uint16_t
1909 rte_eth_find_next_sibling(uint16_t port_id_start, uint16_t ref_port_id);
1910 
1921 #define RTE_ETH_FOREACH_DEV_SIBLING(port_id, ref_port_id) \
1922  for (port_id = rte_eth_find_next_sibling(0, ref_port_id); \
1923  port_id < RTE_MAX_ETHPORTS; \
1924  port_id = rte_eth_find_next_sibling(port_id + 1, ref_port_id))
1925 
1939 __rte_experimental
1940 int rte_eth_dev_owner_new(uint64_t *owner_id);
1941 
1955 __rte_experimental
1956 int rte_eth_dev_owner_set(const uint16_t port_id,
1957  const struct rte_eth_dev_owner *owner);
1958 
1972 __rte_experimental
1973 int rte_eth_dev_owner_unset(const uint16_t port_id,
1974  const uint64_t owner_id);
1975 
1987 __rte_experimental
1988 int rte_eth_dev_owner_delete(const uint64_t owner_id);
1989 
2003 __rte_experimental
2004 int rte_eth_dev_owner_get(const uint16_t port_id,
2005  struct rte_eth_dev_owner *owner);
2006 
2017 uint16_t rte_eth_dev_count_avail(void);
2018 
2027 uint16_t rte_eth_dev_count_total(void);
2028 
2040 uint32_t rte_eth_speed_bitflag(uint32_t speed, int duplex);
2041 
2050 const char *rte_eth_dev_rx_offload_name(uint64_t offload);
2051 
2060 const char *rte_eth_dev_tx_offload_name(uint64_t offload);
2061 
2101 int rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_queue,
2102  uint16_t nb_tx_queue, const struct rte_eth_conf *eth_conf);
2103 
2115 __rte_experimental
2116 int
2117 rte_eth_dev_is_removed(uint16_t port_id);
2118 
2181 int rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
2182  uint16_t nb_rx_desc, unsigned int socket_id,
2183  const struct rte_eth_rxconf *rx_conf,
2184  struct rte_mempool *mb_pool);
2185 
2213 __rte_experimental
2215  (uint16_t port_id, uint16_t rx_queue_id, uint16_t nb_rx_desc,
2216  const struct rte_eth_hairpin_conf *conf);
2217 
2266 int rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2267  uint16_t nb_tx_desc, unsigned int socket_id,
2268  const struct rte_eth_txconf *tx_conf);
2269 
2295 __rte_experimental
2297  (uint16_t port_id, uint16_t tx_queue_id, uint16_t nb_tx_desc,
2298  const struct rte_eth_hairpin_conf *conf);
2299 
2326 __rte_experimental
2327 int rte_eth_hairpin_get_peer_ports(uint16_t port_id, uint16_t *peer_ports,
2328  size_t len, uint32_t direction);
2329 
2352 __rte_experimental
2353 int rte_eth_hairpin_bind(uint16_t tx_port, uint16_t rx_port);
2354 
2379 __rte_experimental
2380 int rte_eth_hairpin_unbind(uint16_t tx_port, uint16_t rx_port);
2381 
2392 int rte_eth_dev_socket_id(uint16_t port_id);
2393 
2403 int rte_eth_dev_is_valid_port(uint16_t port_id);
2404 
2422 int rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id);
2423 
2440 int rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id);
2441 
2459 int rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id);
2460 
2477 int rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id);
2478 
2498 int rte_eth_dev_start(uint16_t port_id);
2499 
2510 int rte_eth_dev_stop(uint16_t port_id);
2511 
2524 int rte_eth_dev_set_link_up(uint16_t port_id);
2525 
2535 int rte_eth_dev_set_link_down(uint16_t port_id);
2536 
2547 int rte_eth_dev_close(uint16_t port_id);
2548 
2586 int rte_eth_dev_reset(uint16_t port_id);
2587 
2599 int rte_eth_promiscuous_enable(uint16_t port_id);
2600 
2612 int rte_eth_promiscuous_disable(uint16_t port_id);
2613 
2624 int rte_eth_promiscuous_get(uint16_t port_id);
2625 
2637 int rte_eth_allmulticast_enable(uint16_t port_id);
2638 
2650 int rte_eth_allmulticast_disable(uint16_t port_id);
2651 
2662 int rte_eth_allmulticast_get(uint16_t port_id);
2663 
2680 int rte_eth_link_get(uint16_t port_id, struct rte_eth_link *link);
2681 
2695 int rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *link);
2696 
2710 __rte_experimental
2711 const char *rte_eth_link_speed_to_str(uint32_t link_speed);
2712 
2731 __rte_experimental
2732 int rte_eth_link_to_str(char *str, size_t len,
2733  const struct rte_eth_link *eth_link);
2734 
2752 int rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats);
2753 
2765 int rte_eth_stats_reset(uint16_t port_id);
2766 
2796 int rte_eth_xstats_get_names(uint16_t port_id,
2797  struct rte_eth_xstat_name *xstats_names,
2798  unsigned int size);
2799 
2829 int rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2830  unsigned int n);
2831 
2856 int
2857 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2858  struct rte_eth_xstat_name *xstats_names, unsigned int size,
2859  uint64_t *ids);
2860 
2885 int rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2886  uint64_t *values, unsigned int size);
2887 
2906 int rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2907  uint64_t *id);
2908 
2921 int rte_eth_xstats_reset(uint16_t port_id);
2922 
2941 int rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id,
2942  uint16_t tx_queue_id, uint8_t stat_idx);
2943 
2962 int rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id,
2963  uint16_t rx_queue_id,
2964  uint8_t stat_idx);
2965 
2978 int rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr);
2979 
3022 int rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info);
3023 
3043 int rte_eth_dev_fw_version_get(uint16_t port_id,
3044  char *fw_version, size_t fw_size);
3045 
3084 int rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
3085  uint32_t *ptypes, int num);
3119 __rte_experimental
3120 int rte_eth_dev_set_ptypes(uint16_t port_id, uint32_t ptype_mask,
3121  uint32_t *set_ptypes, unsigned int num);
3122 
3134 int rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu);
3135 
3153 int rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu);
3154 
3174 int rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on);
3175 
3194 int rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
3195  int on);
3196 
3213 int rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
3214  enum rte_vlan_type vlan_type,
3215  uint16_t tag_type);
3216 
3234 int rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask);
3235 
3249 int rte_eth_dev_get_vlan_offload(uint16_t port_id);
3250 
3265 int rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on);
3266 
3267 typedef void (*buffer_tx_error_fn)(struct rte_mbuf **unsent, uint16_t count,
3268  void *userdata);
3269 
3275  buffer_tx_error_fn error_callback;
3276  void *error_userdata;
3277  uint16_t size;
3278  uint16_t length;
3279  struct rte_mbuf *pkts[];
3281 };
3282 
3289 #define RTE_ETH_TX_BUFFER_SIZE(sz) \
3290  (sizeof(struct rte_eth_dev_tx_buffer) + (sz) * sizeof(struct rte_mbuf *))
3291 
3302 int
3303 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size);
3304 
3329 int
3331  buffer_tx_error_fn callback, void *userdata);
3332 
3355 void
3356 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
3357  void *userdata);
3358 
3382 void
3383 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
3384  void *userdata);
3385 
3411 int
3412 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt);
3413 
3429 };
3430 
3438  uint64_t metadata;
3452 };
3453 
3472 };
3473 
3474 typedef int (*rte_eth_dev_cb_fn)(uint16_t port_id,
3475  enum rte_eth_event_type event, void *cb_arg, void *ret_param);
3495 int rte_eth_dev_callback_register(uint16_t port_id,
3496  enum rte_eth_event_type event,
3497  rte_eth_dev_cb_fn cb_fn, void *cb_arg);
3498 
3517 int rte_eth_dev_callback_unregister(uint16_t port_id,
3518  enum rte_eth_event_type event,
3519  rte_eth_dev_cb_fn cb_fn, void *cb_arg);
3520 
3542 int rte_eth_dev_rx_intr_enable(uint16_t port_id, uint16_t queue_id);
3543 
3564 int rte_eth_dev_rx_intr_disable(uint16_t port_id, uint16_t queue_id);
3565 
3583 int rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data);
3584 
3606 int rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3607  int epfd, int op, void *data);
3608 
3626 __rte_experimental
3627 int
3628 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id);
3629 
3643 int rte_eth_led_on(uint16_t port_id);
3644 
3658 int rte_eth_led_off(uint16_t port_id);
3659 
3688 __rte_experimental
3689 int rte_eth_fec_get_capability(uint16_t port_id,
3690  struct rte_eth_fec_capa *speed_fec_capa,
3691  unsigned int num);
3692 
3716 __rte_experimental
3717 int rte_eth_fec_get(uint16_t port_id, uint32_t *fec_capa);
3718 
3739 __rte_experimental
3740 int rte_eth_fec_set(uint16_t port_id, uint32_t fec_capa);
3741 
3755 int rte_eth_dev_flow_ctrl_get(uint16_t port_id,
3756  struct rte_eth_fc_conf *fc_conf);
3757 
3772 int rte_eth_dev_flow_ctrl_set(uint16_t port_id,
3773  struct rte_eth_fc_conf *fc_conf);
3774 
3790 int rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
3791  struct rte_eth_pfc_conf *pfc_conf);
3792 
3811 int rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *mac_addr,
3812  uint32_t pool);
3813 
3827 int rte_eth_dev_mac_addr_remove(uint16_t port_id,
3828  struct rte_ether_addr *mac_addr);
3829 
3843 int rte_eth_dev_default_mac_addr_set(uint16_t port_id,
3844  struct rte_ether_addr *mac_addr);
3845 
3863 int rte_eth_dev_rss_reta_update(uint16_t port_id,
3864  struct rte_eth_rss_reta_entry64 *reta_conf,
3865  uint16_t reta_size);
3866 
3885 int rte_eth_dev_rss_reta_query(uint16_t port_id,
3886  struct rte_eth_rss_reta_entry64 *reta_conf,
3887  uint16_t reta_size);
3888 
3908 int rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr,
3909  uint8_t on);
3910 
3929 int rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on);
3930 
3953 int rte_eth_mirror_rule_set(uint16_t port_id,
3954  struct rte_eth_mirror_conf *mirror_conf,
3955  uint8_t rule_id,
3956  uint8_t on);
3957 
3972 int rte_eth_mirror_rule_reset(uint16_t port_id,
3973  uint8_t rule_id);
3974 
3991 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3992  uint16_t tx_rate);
3993 
4008 int rte_eth_dev_rss_hash_update(uint16_t port_id,
4009  struct rte_eth_rss_conf *rss_conf);
4010 
4025 int
4026 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
4027  struct rte_eth_rss_conf *rss_conf);
4028 
4047 int
4048 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
4049  struct rte_eth_udp_tunnel *tunnel_udp);
4050 
4070 int
4071 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
4072  struct rte_eth_udp_tunnel *tunnel_udp);
4073 
4087 int rte_eth_dev_get_dcb_info(uint16_t port_id,
4088  struct rte_eth_dcb_info *dcb_info);
4089 
4090 struct rte_eth_rxtx_callback;
4091 
4117 const struct rte_eth_rxtx_callback *
4118 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
4119  rte_rx_callback_fn fn, void *user_param);
4120 
4147 const struct rte_eth_rxtx_callback *
4148 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
4149  rte_rx_callback_fn fn, void *user_param);
4150 
4176 const struct rte_eth_rxtx_callback *
4177 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
4178  rte_tx_callback_fn fn, void *user_param);
4179 
4213 int rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
4214  const struct rte_eth_rxtx_callback *user_cb);
4215 
4249 int rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
4250  const struct rte_eth_rxtx_callback *user_cb);
4251 
4271 int rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4272  struct rte_eth_rxq_info *qinfo);
4273 
4293 int rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4294  struct rte_eth_txq_info *qinfo);
4295 
4314 __rte_experimental
4315 int rte_eth_rx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
4316  struct rte_eth_burst_mode *mode);
4317 
4336 __rte_experimental
4337 int rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
4338  struct rte_eth_burst_mode *mode);
4339 
4358 int rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info);
4359 
4372 int rte_eth_dev_get_eeprom_length(uint16_t port_id);
4373 
4390 int rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info);
4391 
4408 int rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info);
4409 
4428 __rte_experimental
4429 int
4430 rte_eth_dev_get_module_info(uint16_t port_id,
4431  struct rte_eth_dev_module_info *modinfo);
4432 
4452 __rte_experimental
4453 int
4454 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4455  struct rte_dev_eeprom_info *info);
4456 
4475 int rte_eth_dev_set_mc_addr_list(uint16_t port_id,
4476  struct rte_ether_addr *mc_addr_set,
4477  uint32_t nb_mc_addr);
4478 
4491 int rte_eth_timesync_enable(uint16_t port_id);
4492 
4505 int rte_eth_timesync_disable(uint16_t port_id);
4506 
4525 int rte_eth_timesync_read_rx_timestamp(uint16_t port_id,
4526  struct timespec *timestamp, uint32_t flags);
4527 
4543 int rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
4544  struct timespec *timestamp);
4545 
4563 int rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta);
4564 
4579 int rte_eth_timesync_read_time(uint16_t port_id, struct timespec *time);
4580 
4599 int rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *time);
4600 
4645 __rte_experimental
4646 int
4647 rte_eth_read_clock(uint16_t port_id, uint64_t *clock);
4648 
4664 int
4665 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id);
4666 
4682 int
4683 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name);
4684 
4701 int rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4702  uint16_t *nb_rx_desc,
4703  uint16_t *nb_tx_desc);
4704 
4719 int
4720 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool);
4721 
4731 void *
4732 rte_eth_dev_get_sec_ctx(uint16_t port_id);
4733 
4748 __rte_experimental
4749 int rte_eth_dev_hairpin_capability_get(uint16_t port_id,
4750  struct rte_eth_hairpin_cap *cap);
4751 
4752 #include <rte_ethdev_core.h>
4753 
4841 static inline uint16_t
4842 rte_eth_rx_burst(uint16_t port_id, uint16_t queue_id,
4843  struct rte_mbuf **rx_pkts, const uint16_t nb_pkts)
4844 {
4845  struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4846  uint16_t nb_rx;
4847 
4848 #ifdef RTE_LIBRTE_ETHDEV_DEBUG
4849  RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
4850  RTE_FUNC_PTR_OR_ERR_RET(*dev->rx_pkt_burst, 0);
4851 
4852  if (queue_id >= dev->data->nb_rx_queues) {
4853  RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4854  return 0;
4855  }
4856 #endif
4857  nb_rx = (*dev->rx_pkt_burst)(dev->data->rx_queues[queue_id],
4858  rx_pkts, nb_pkts);
4859 
4860 #ifdef RTE_ETHDEV_RXTX_CALLBACKS
4861  struct rte_eth_rxtx_callback *cb;
4862 
4863  /* __ATOMIC_RELEASE memory order was used when the
4864  * call back was inserted into the list.
4865  * Since there is a clear dependency between loading
4866  * cb and cb->fn/cb->next, __ATOMIC_ACQUIRE memory order is
4867  * not required.
4868  */
4869  cb = __atomic_load_n(&dev->post_rx_burst_cbs[queue_id],
4870  __ATOMIC_RELAXED);
4871 
4872  if (unlikely(cb != NULL)) {
4873  do {
4874  nb_rx = cb->fn.rx(port_id, queue_id, rx_pkts, nb_rx,
4875  nb_pkts, cb->param);
4876  cb = cb->next;
4877  } while (cb != NULL);
4878  }
4879 #endif
4880 
4881  rte_ethdev_trace_rx_burst(port_id, queue_id, (void **)rx_pkts, nb_rx);
4882  return nb_rx;
4883 }
4884 
4898 static inline int
4899 rte_eth_rx_queue_count(uint16_t port_id, uint16_t queue_id)
4900 {
4901  struct rte_eth_dev *dev;
4902 
4903  RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4904  dev = &rte_eth_devices[port_id];
4905  RTE_FUNC_PTR_OR_ERR_RET(*dev->rx_queue_count, -ENOTSUP);
4906  if (queue_id >= dev->data->nb_rx_queues ||
4907  dev->data->rx_queues[queue_id] == NULL)
4908  return -EINVAL;
4909 
4910  return (int)(*dev->rx_queue_count)(dev, queue_id);
4911 }
4912 
4928 __rte_deprecated
4929 static inline int
4930 rte_eth_rx_descriptor_done(uint16_t port_id, uint16_t queue_id, uint16_t offset)
4931 {
4932  struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4933  RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4934  RTE_FUNC_PTR_OR_ERR_RET(*dev->rx_descriptor_done, -ENOTSUP);
4935  return (*dev->rx_descriptor_done)(dev->data->rx_queues[queue_id], offset);
4936 }
4937 
4938 #define RTE_ETH_RX_DESC_AVAIL 0
4939 #define RTE_ETH_RX_DESC_DONE 1
4940 #define RTE_ETH_RX_DESC_UNAVAIL 2
4975 static inline int
4976 rte_eth_rx_descriptor_status(uint16_t port_id, uint16_t queue_id,
4977  uint16_t offset)
4978 {
4979  struct rte_eth_dev *dev;
4980  void *rxq;
4981 
4982 #ifdef RTE_LIBRTE_ETHDEV_DEBUG
4983  RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4984 #endif
4985  dev = &rte_eth_devices[port_id];
4986 #ifdef RTE_LIBRTE_ETHDEV_DEBUG
4987  if (queue_id >= dev->data->nb_rx_queues)
4988  return -ENODEV;
4989 #endif
4990  RTE_FUNC_PTR_OR_ERR_RET(*dev->rx_descriptor_status, -ENOTSUP);
4991  rxq = dev->data->rx_queues[queue_id];
4992 
4993  return (*dev->rx_descriptor_status)(rxq, offset);
4994 }
4995 
4996 #define RTE_ETH_TX_DESC_FULL 0
4997 #define RTE_ETH_TX_DESC_DONE 1
4998 #define RTE_ETH_TX_DESC_UNAVAIL 2
5033 static inline int rte_eth_tx_descriptor_status(uint16_t port_id,
5034  uint16_t queue_id, uint16_t offset)
5035 {
5036  struct rte_eth_dev *dev;
5037  void *txq;
5038 
5039 #ifdef RTE_LIBRTE_ETHDEV_DEBUG
5040  RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5041 #endif
5042  dev = &rte_eth_devices[port_id];
5043 #ifdef RTE_LIBRTE_ETHDEV_DEBUG
5044  if (queue_id >= dev->data->nb_tx_queues)
5045  return -ENODEV;
5046 #endif
5047  RTE_FUNC_PTR_OR_ERR_RET(*dev->tx_descriptor_status, -ENOTSUP);
5048  txq = dev->data->tx_queues[queue_id];
5049 
5050  return (*dev->tx_descriptor_status)(txq, offset);
5051 }
5052 
5119 static inline uint16_t
5120 rte_eth_tx_burst(uint16_t port_id, uint16_t queue_id,
5121  struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
5122 {
5123  struct rte_eth_dev *dev = &rte_eth_devices[port_id];
5124 
5125 #ifdef RTE_LIBRTE_ETHDEV_DEBUG
5126  RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
5127  RTE_FUNC_PTR_OR_ERR_RET(*dev->tx_pkt_burst, 0);
5128 
5129  if (queue_id >= dev->data->nb_tx_queues) {
5130  RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
5131  return 0;
5132  }
5133 #endif
5134 
5135 #ifdef RTE_ETHDEV_RXTX_CALLBACKS
5136  struct rte_eth_rxtx_callback *cb;
5137 
5138  /* __ATOMIC_RELEASE memory order was used when the
5139  * call back was inserted into the list.
5140  * Since there is a clear dependency between loading
5141  * cb and cb->fn/cb->next, __ATOMIC_ACQUIRE memory order is
5142  * not required.
5143  */
5144  cb = __atomic_load_n(&dev->pre_tx_burst_cbs[queue_id],
5145  __ATOMIC_RELAXED);
5146 
5147  if (unlikely(cb != NULL)) {
5148  do {
5149  nb_pkts = cb->fn.tx(port_id, queue_id, tx_pkts, nb_pkts,
5150  cb->param);
5151  cb = cb->next;
5152  } while (cb != NULL);
5153  }
5154 #endif
5155 
5156  rte_ethdev_trace_tx_burst(port_id, queue_id, (void **)tx_pkts,
5157  nb_pkts);
5158  return (*dev->tx_pkt_burst)(dev->data->tx_queues[queue_id], tx_pkts, nb_pkts);
5159 }
5160 
5215 #ifndef RTE_ETHDEV_TX_PREPARE_NOOP
5216 
5217 static inline uint16_t
5218 rte_eth_tx_prepare(uint16_t port_id, uint16_t queue_id,
5219  struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
5220 {
5221  struct rte_eth_dev *dev;
5222 
5223 #ifdef RTE_LIBRTE_ETHDEV_DEBUG
5224  if (!rte_eth_dev_is_valid_port(port_id)) {
5225  RTE_ETHDEV_LOG(ERR, "Invalid TX port_id=%u\n", port_id);
5226  rte_errno = ENODEV;
5227  return 0;
5228  }
5229 #endif
5230 
5231  dev = &rte_eth_devices[port_id];
5232 
5233 #ifdef RTE_LIBRTE_ETHDEV_DEBUG
5234  if (queue_id >= dev->data->nb_tx_queues) {
5235  RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
5236  rte_errno = EINVAL;
5237  return 0;
5238  }
5239 #endif
5240 
5241  if (!dev->tx_pkt_prepare)
5242  return nb_pkts;
5243 
5244  return (*dev->tx_pkt_prepare)(dev->data->tx_queues[queue_id],
5245  tx_pkts, nb_pkts);
5246 }
5247 
5248 #else
5249 
5250 /*
5251  * Native NOOP operation for compilation targets which doesn't require any
5252  * preparations steps, and functional NOOP may introduce unnecessary performance
5253  * drop.
5254  *
5255  * Generally this is not a good idea to turn it on globally and didn't should
5256  * be used if behavior of tx_preparation can change.
5257  */
5258 
5259 static inline uint16_t
5260 rte_eth_tx_prepare(__rte_unused uint16_t port_id,
5261  __rte_unused uint16_t queue_id,
5262  __rte_unused struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
5263 {
5264  return nb_pkts;
5265 }
5266 
5267 #endif
5268 
5291 static inline uint16_t
5292 rte_eth_tx_buffer_flush(uint16_t port_id, uint16_t queue_id,
5293  struct rte_eth_dev_tx_buffer *buffer)
5294 {
5295  uint16_t sent;
5296  uint16_t to_send = buffer->length;
5297 
5298  if (to_send == 0)
5299  return 0;
5300 
5301  sent = rte_eth_tx_burst(port_id, queue_id, buffer->pkts, to_send);
5302 
5303  buffer->length = 0;
5304 
5305  /* All packets sent, or to be dealt with by callback below */
5306  if (unlikely(sent != to_send))
5307  buffer->error_callback(&buffer->pkts[sent],
5308  (uint16_t)(to_send - sent),
5309  buffer->error_userdata);
5310 
5311  return sent;
5312 }
5313 
5344 static __rte_always_inline uint16_t
5345 rte_eth_tx_buffer(uint16_t port_id, uint16_t queue_id,
5346  struct rte_eth_dev_tx_buffer *buffer, struct rte_mbuf *tx_pkt)
5347 {
5348  buffer->pkts[buffer->length++] = tx_pkt;
5349  if (buffer->length < buffer->size)
5350  return 0;
5351 
5352  return rte_eth_tx_buffer_flush(port_id, queue_id, buffer);
5353 }
5354 
5355 #ifdef __cplusplus
5356 }
5357 #endif
5358 
5359 #endif /* _RTE_ETHDEV_H_ */
ETH_MQ_RX_VMDQ_RSS
@ ETH_MQ_RX_VMDQ_RSS
Definition: rte_ethdev.h:364
rte_eth_tx_buffer_init
int rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
rte_eth_dcb_info
Definition: rte_ethdev.h:1664
rte_eth_rx_burst_mode_get
__rte_experimental int rte_eth_rx_burst_mode_get(uint16_t port_id, uint16_t queue_id, struct rte_eth_burst_mode *mode)
rte_eth_dev_rx_offload_name
const char * rte_eth_dev_rx_offload_name(uint64_t offload)
rte_eth_rxconf::rx_nseg
uint16_t rx_nseg
Definition: rte_ethdev.h:1037
rte_eth_dev_info::switch_info
struct rte_eth_switch_info switch_info
Definition: rte_ethdev.h:1558
RTE_FDIR_REPORT_STATUS_ALWAYS
@ RTE_FDIR_REPORT_STATUS_ALWAYS
Definition: rte_ethdev.h:1244
rte_eth_fc_conf::high_water
uint32_t high_water
Definition: rte_ethdev.h:1191
rte_eth_dev_info::max_hash_mac_addrs
uint32_t max_hash_mac_addrs
Definition: rte_ethdev.h:1520
rte_eth_fc_conf::pause_time
uint16_t pause_time
Definition: rte_ethdev.h:1193
rte_eth_vmdq_rx_conf::enable_default_pool
uint8_t enable_default_pool
Definition: rte_ethdev.h:938
rte_eth_rx_descriptor_status
static int rte_eth_rx_descriptor_status(uint16_t port_id, uint16_t queue_id, uint16_t offset)
Definition: rte_ethdev.h:4976
rte_eth_stats::obytes
uint64_t obytes
Definition: rte_ethdev.h:248
rte_eth_rxq_info::rx_buf_size
uint16_t rx_buf_size
Definition: rte_ethdev.h:1573
rte_eth_dev_set_vlan_offload
int rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
RTE_ETH_EVENT_DESTROY
@ RTE_ETH_EVENT_DESTROY
Definition: rte_ethdev.h:3468
rte_eth_timesync_read_rx_timestamp
int rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp, uint32_t flags)
rte_eth_link_to_str
__rte_experimental int rte_eth_link_to_str(char *str, size_t len, const struct rte_eth_link *eth_link)
rte_eth_txmode::hw_vlan_reject_tagged
__extension__ uint8_t hw_vlan_reject_tagged
Definition: rte_ethdev.h:964
rte_eth_txmode::mq_mode
enum rte_eth_tx_mq_mode mq_mode
Definition: rte_ethdev.h:953
rte_eth_dev_adjust_nb_rx_tx_desc
int rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id, uint16_t *nb_rx_desc, uint16_t *nb_tx_desc)
rte_eth_dev_get_reg_info
int rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
rte_eth_vmdq_dcb_conf::default_pool
uint8_t default_pool
Definition: rte_ethdev.h:908
rte_eth_dev_vlan_filter
int rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
rte_eth_txmode::reserved_ptrs
void * reserved_ptrs[2]
Definition: rte_ethdev.h:971
rte_eth_dev_set_tx_queue_stats_mapping
int rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id, uint8_t stat_idx)
rte_eth_rx_queue_count
static int rte_eth_rx_queue_count(uint16_t port_id, uint16_t queue_id)
Definition: rte_ethdev.h:4899
rte_eth_dev_set_eeprom
int rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
rte_eth_conf::vmdq_tx_conf
struct rte_eth_vmdq_tx_conf vmdq_tx_conf
Definition: rte_ethdev.h:1322
rte_eth_fec_mode
rte_eth_fec_mode
Definition: rte_ethdev.h:1676
rte_eth_tx_prepare
static uint16_t rte_eth_tx_prepare(uint16_t port_id, uint16_t queue_id, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
Definition: rte_ethdev.h:5218
rte_eth_rxconf
Definition: rte_ethdev.h:1032
rte_eth_dev_info::rx_offload_capa
uint64_t rx_offload_capa
Definition: rte_ethdev.h:1524
rte_eth_switch_info::port_id
uint16_t port_id
Definition: rte_ethdev.h:1470
rte_eth_pfc_conf
Definition: rte_ethdev.h:1205
rte_eth_iterator_init
int rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs)
rte_eth_dev_cb_fn
int(* rte_eth_dev_cb_fn)(uint16_t port_id, enum rte_eth_event_type event, void *cb_arg, void *ret_param)
Definition: rte_ethdev.h:3474
rte_eth_remove_rx_callback
int rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id, const struct rte_eth_rxtx_callback *user_cb)
rte_eth_dev_tx_buffer::size
uint16_t size
Definition: rte_ethdev.h:3277
rte_eth_thresh::pthresh
uint8_t pthresh
Definition: rte_ethdev.h:334
rte_eth_dev_portconf::burst_size
uint16_t burst_size
Definition: rte_ethdev.h:1453
rte_eth_conf::tx_adv_conf
union rte_eth_conf::@154 tx_adv_conf
link_speed
uint32_t link_speed
Definition: rte_ethdev.h:313
rte_eth_dev_info::dev_capa
uint64_t dev_capa
Definition: rte_ethdev.h:1553
rte_eth_dev_info::reserved_64s
uint64_t reserved_64s[2]
Definition: rte_ethdev.h:1560
rte_eth_tx_mq_mode
rte_eth_tx_mq_mode
Definition: rte_ethdev.h:383
unlikely
#define unlikely(x)
Definition: rte_branch_prediction.h:42
rte_eth_find_next_of
__rte_experimental uint16_t rte_eth_find_next_of(uint16_t port_id_start, const struct rte_device *parent)
rte_eth_vmdq_rx_conf::nb_pool_maps
uint8_t nb_pool_maps
Definition: rte_ethdev.h:941
rte_fdir_conf
Definition: rte_ethdev.h:1253
rte_eth_led_on
int rte_eth_led_on(uint16_t port_id)
rte_eth_allmulticast_enable
int rte_eth_allmulticast_enable(uint16_t port_id)
rte_eth_dev_info::driver_name
const char * driver_name
Definition: rte_ethdev.h:1506
rte_eth_udp_tunnel::udp_port
uint16_t udp_port
Definition: rte_ethdev.h:1272
rte_eth_iterator_cleanup
void rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
rte_eth_dev_get_sec_ctx
void * rte_eth_dev_get_sec_ctx(uint16_t port_id)
RTE_ETH_EVENT_IPSEC
@ RTE_ETH_EVENT_IPSEC
Definition: rte_ethdev.h:3469
rte_rx_callback_fn
uint16_t(* rte_rx_callback_fn)(uint16_t port_id, uint16_t queue, struct rte_mbuf *pkts[], uint16_t nb_pkts, uint16_t max_pkts, void *user_param)
Definition: rte_ethdev.h:1747
rte_eth_txq_info
Definition: rte_ethdev.h:1580
ETH_MQ_TX_NONE
@ ETH_MQ_TX_NONE
Definition: rte_ethdev.h:384
rte_eth_rxq_info
Definition: rte_ethdev.h:1568
rte_eth_fc_conf::autoneg
uint8_t autoneg
Definition: rte_ethdev.h:1197
ETH_DCB_NUM_USER_PRIORITIES
#define ETH_DCB_NUM_USER_PRIORITIES
Definition: rte_ethdev.h:775
rte_eth_dev_tx_buffer::length
uint16_t length
Definition: rte_ethdev.h:3278
rte_eth_tx_queue_info_get
int rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id, struct rte_eth_txq_info *qinfo)
rte_eth_dev_info::dev_flags
const uint32_t * dev_flags
Definition: rte_ethdev.h:1511
rte_eth_vmdq_rx_conf::nb_queue_pools
enum rte_eth_nb_pools nb_queue_pools
Definition: rte_ethdev.h:937
RTE_ETH_EVENT_IPSEC_SA_TIME_EXPIRY
@ RTE_ETH_EVENT_IPSEC_SA_TIME_EXPIRY
Definition: rte_ethdev.h:3423
rte_eth_dev_rx_intr_ctl_q_get_fd
__rte_experimental int rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
rte_eth_vmdq_rx_conf::enable_loop_back
uint8_t enable_loop_back
Definition: rte_ethdev.h:940
rte_log.h
rte_eth_stats::ierrors
uint64_t ierrors
Definition: rte_ethdev.h:253
rte_eth_tx_queue_setup
int rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id, uint16_t nb_tx_desc, unsigned int socket_id, const struct rte_eth_txconf *tx_conf)
rte_eth_dev_get_eeprom
int rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
rte_eth_txconf
Definition: rte_ethdev.h:1060
RTE_ETH_EVENT_INTR_RESET
@ RTE_ETH_EVENT_INTR_RESET
Definition: rte_ethdev.h:3462
rte_eth_hairpin_cap::max_rx_2_tx
uint16_t max_rx_2_tx
Definition: rte_ethdev.h:1088
RTE_ETH_DEV_UNUSED
@ RTE_ETH_DEV_UNUSED
Definition: rte_ethdev.h:1779
rte_eth_dev_info::nb_rx_queues
uint16_t nb_rx_queues
Definition: rte_ethdev.h:1546
rte_eth_dev_get_dcb_info
int rte_eth_dev_get_dcb_info(uint16_t port_id, struct rte_eth_dcb_info *dcb_info)
RTE_FC_RX_PAUSE
@ RTE_FC_RX_PAUSE
Definition: rte_ethdev.h:1180
rte_eth_dev_configure
int rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_queue, uint16_t nb_tx_queue, const struct rte_eth_conf *eth_conf)
rte_eth_dev_info::max_lro_pkt_size
uint32_t max_lro_pkt_size
Definition: rte_ethdev.h:1515
rte_eth_thresh
Definition: rte_ethdev.h:333
rte_eth_rxmode::max_rx_pkt_len
uint32_t max_rx_pkt_len
Definition: rte_ethdev.h:403
rte_eth_rxseg_split::mp
struct rte_mempool * mp
Definition: rte_ethdev.h:1011
rte_eth_dev_tx_queue_stop
int rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
rte_eth_desc_lim::nb_seg_max
uint16_t nb_seg_max
Definition: rte_ethdev.h:1159
ETH_16_POOLS
@ ETH_16_POOLS
Definition: rte_ethdev.h:866
RTE_ETH_FEC_BASER
@ RTE_ETH_FEC_BASER
Definition: rte_ethdev.h:1679
rte_eth_dev_info::max_rx_queues
uint16_t max_rx_queues
Definition: rte_ethdev.h:1516
rte_eth_dev_owner_unset
__rte_experimental int rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
rte_eth_dev_rx_queue_stop
int rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
rte_eth_thresh::hthresh
uint8_t hthresh
Definition: rte_ethdev.h:335
ETH_MQ_RX_NONE
@ ETH_MQ_RX_NONE
Definition: rte_ethdev.h:352
rte_eth_rss_reta_entry64
Definition: rte_ethdev.h:844
__rte_always_inline
#define __rte_always_inline
Definition: rte_common.h:226
rte_eth_dev_get_vlan_offload
int rte_eth_dev_get_vlan_offload(uint16_t port_id)
rte_eth_allmulticast_disable
int rte_eth_allmulticast_disable(uint16_t port_id)
rte_eth_dev_owner_set
__rte_experimental int rte_eth_dev_owner_set(const uint16_t port_id, const struct rte_eth_dev_owner *owner)
rte_eth_vlan_mirror::vlan_mask
uint64_t vlan_mask
Definition: rte_ethdev.h:822
rte_eth_rss_reta_entry64::reta
uint16_t reta[RTE_RETA_GROUP_SIZE]
Definition: rte_ethdev.h:847
rte_eth_dcb_info::nb_tcs
uint8_t nb_tcs
Definition: rte_ethdev.h:1665
rte_eth_hairpin_unbind
__rte_experimental int rte_eth_hairpin_unbind(uint16_t tx_port, uint16_t rx_port)
rte_eth_stats::ipackets
uint64_t ipackets
Definition: rte_ethdev.h:245
rte_eth_dev_rx_intr_disable
int rte_eth_dev_rx_intr_disable(uint16_t port_id, uint16_t queue_id)
rte_eth_dev_set_mtu
int rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
rte_eth_dev_set_mc_addr_list
int rte_eth_dev_set_mc_addr_list(uint16_t port_id, struct rte_ether_addr *mc_addr_set, uint32_t nb_mc_addr)
ETH_MQ_RX_DCB
@ ETH_MQ_RX_DCB
Definition: rte_ethdev.h:357
rte_interrupts.h
rte_eth_dev_info::vmdq_pool_base
uint16_t vmdq_pool_base
Definition: rte_ethdev.h:1541
rte_fdir_conf::flex_conf
struct rte_eth_fdir_flex_conf flex_conf
Definition: rte_ethdev.h:1260
rte_eth_conf::rxmode
struct rte_eth_rxmode rxmode
Definition: rte_ethdev.h:1301
rte_eth_mirror_rule_reset
int rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
rte_eth_dev_info::min_mtu
uint16_t min_mtu
Definition: rte_ethdev.h:1509
rte_eth_rxseg_capa::offset_align_log2
uint32_t offset_align_log2
Definition: rte_ethdev.h:1490
rte_eth_conf::intr_conf
struct rte_intr_conf intr_conf
Definition: rte_ethdev.h:1329
rte_eth_stats::rx_nombuf
uint64_t rx_nombuf
Definition: rte_ethdev.h:255
rte_eth_vmdq_dcb_conf::vlan_id
uint16_t vlan_id
Definition: rte_ethdev.h:911
rte_eth_dev_flow_ctrl_get
int rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
rte_eth_dev_fw_version_get
int rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
rte_eth_vmdq_dcb_conf::pools
uint64_t pools
Definition: rte_ethdev.h:912
rte_eth_pfc_conf::fc
struct rte_eth_fc_conf fc
Definition: rte_ethdev.h:1206
rte_eth_xstat::value
uint64_t value
Definition: rte_ethdev.h:1619
rte_fdir_conf::pballoc
enum rte_fdir_pballoc_type pballoc
Definition: rte_ethdev.h:1255
ETH_VMDQ_MAX_VLAN_FILTERS
#define ETH_VMDQ_MAX_VLAN_FILTERS
Definition: rte_ethdev.h:774
rte_eth_dev_mac_addr_remove
int rte_eth_dev_mac_addr_remove(uint16_t port_id, struct rte_ether_addr *mac_addr)
rte_eth_dev_tx_buffer
Definition: rte_ethdev.h:3274
rte_eth_event_ipsec_desc
Definition: rte_ethdev.h:3435
rte_eth_rxconf::rx_deferred_start
uint8_t rx_deferred_start
Definition: rte_ethdev.h:1036
ETH_MIRROR_MAX_VLANS
#define ETH_MIRROR_MAX_VLANS
Definition: rte_ethdev.h:810
rte_eth_rxmode::mq_mode
enum rte_eth_rx_mq_mode mq_mode
Definition: rte_ethdev.h:402
rte_eth_rx_burst
static uint16_t rte_eth_rx_burst(uint16_t port_id, uint16_t queue_id, struct rte_mbuf **rx_pkts, const uint16_t nb_pkts)
Definition: rte_ethdev.h:4842
rte_eth_timesync_read_tx_timestamp
int rte_eth_timesync_read_tx_timestamp(uint16_t port_id, struct timespec *timestamp)
rte_eth_dev_portconf::ring_size
uint16_t ring_size
Definition: rte_ethdev.h:1454
rte_eth_dev_info::tx_queue_offload_capa
uint64_t tx_queue_offload_capa
Definition: rte_ethdev.h:1530
rte_eth_xstats_reset
int rte_eth_xstats_reset(uint16_t port_id)
rte_ether.h
rte_eth_rxseg_capa::max_nseg
uint16_t max_nseg
Definition: rte_ethdev.h:1491
rte_mbuf
Definition: rte_mbuf_core.h:474
rte_eth_dev_info::tx_desc_lim
struct rte_eth_desc_lim tx_desc_lim
Definition: rte_ethdev.h:1543
rte_eth_dev_rss_hash_update
int rte_eth_dev_rss_hash_update(uint16_t port_id, struct rte_eth_rss_conf *rss_conf)
ETH_MQ_RX_VMDQ_DCB_RSS
@ ETH_MQ_RX_VMDQ_DCB_RSS
Definition: rte_ethdev.h:368
rte_eth_link_get_nowait
int rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *link)
rte_eth_dev_state
rte_eth_dev_state
Definition: rte_ethdev.h:1777
rte_eth_xstats_get
int rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats, unsigned int n)
rte_eth_nb_tcs
rte_eth_nb_tcs
Definition: rte_ethdev.h:855
rte_eth_hairpin_peer::port
uint16_t port
Definition: rte_ethdev.h:1103
rte_eth_rxseg_capa
Definition: rte_ethdev.h:1486
RTE_FDIR_PBALLOC_256K
@ RTE_FDIR_PBALLOC_256K
Definition: rte_ethdev.h:1235
rte_eth_dev_info_get
int rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
rte_eth_xstats_get_id_by_name
int rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name, uint64_t *id)
rte_eth_rss_conf::rss_key_len
uint8_t rss_key_len
Definition: rte_ethdev.h:456
rte_eth_promiscuous_enable
int rte_eth_promiscuous_enable(uint16_t port_id)
rte_eth_dcb_tc_queue_mapping
Definition: rte_ethdev.h:1647
rte_eth_led_off
int rte_eth_led_off(uint16_t port_id)
rte_eth_add_tx_callback
const struct rte_eth_rxtx_callback * rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id, rte_tx_callback_fn fn, void *user_param)
RTE_ETH_EVENT_UNKNOWN
@ RTE_ETH_EVENT_UNKNOWN
Definition: rte_ethdev.h:3458
rte_eth_dev_tx_buffer::pkts
struct rte_mbuf * pkts[]
Definition: rte_ethdev.h:3279
rte_eth_rxseg_split::length
uint16_t length
Definition: rte_ethdev.h:1012
rte_eth_dev_portconf::nb_queues
uint16_t nb_queues
Definition: rte_ethdev.h:1455
rte_eth_dev_udp_tunnel_port_delete
int rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id, struct rte_eth_udp_tunnel *tunnel_udp)
rte_eth_promiscuous_get
int rte_eth_promiscuous_get(uint16_t port_id)
rte_eth_speed_bitflag
uint32_t rte_eth_speed_bitflag(uint32_t speed, int duplex)
rte_intr_conf
Definition: rte_ethdev.h:1279
rte_eth_hairpin_conf
Definition: rte_ethdev.h:1113
rte_errno.h
RTE_ETH_XSTATS_NAME_SIZE
#define RTE_ETH_XSTATS_NAME_SIZE
Definition: rte_ethdev.h:1606
rte_intr_conf::rmv
uint32_t rmv
Definition: rte_ethdev.h:1285
RTE_FDIR_PBALLOC_128K
@ RTE_FDIR_PBALLOC_128K
Definition: rte_ethdev.h:1234
rte_eth_rxmode::reserved_64s
uint64_t reserved_64s[2]
Definition: rte_ethdev.h:414
rte_eth_txconf::tx_thresh
struct rte_eth_thresh tx_thresh
Definition: rte_ethdev.h:1061
rte_eth_fec_get
__rte_experimental int rte_eth_fec_get(uint16_t port_id, uint32_t *fec_capa)
rte_eth_rxmode::split_hdr_size
uint16_t split_hdr_size
Definition: rte_ethdev.h:406
rte_dev_iterator
Definition: rte_dev.h:238
rte_eth_dev_info::device
struct rte_device * device
Definition: rte_ethdev.h:1505
rte_eth_dev_info::speed_capa
uint32_t speed_capa
Definition: rte_ethdev.h:1544
rte_eth_rxseg_split::offset
uint16_t offset
Definition: rte_ethdev.h:1013
rte_eth_fc_conf::mac_ctrl_frame_fwd
uint8_t mac_ctrl_frame_fwd
Definition: rte_ethdev.h:1196
rte_eth_dev_is_valid_port
int rte_eth_dev_is_valid_port(uint16_t port_id)
rte_fdir_conf::mode
enum rte_fdir_mode mode
Definition: rte_ethdev.h:1254
rte_eth_macaddr_get
int rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr)
rte_eth_dev_info::vmdq_queue_base
uint16_t vmdq_queue_base
Definition: rte_ethdev.h:1539
rte_eth_xstat::id
uint64_t id
Definition: rte_ethdev.h:1618
rte_eth_dev_rx_intr_ctl
int rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
rte_fdir_conf::drop_queue
uint8_t drop_queue
Definition: rte_ethdev.h:1258
rte_eth_dev_hairpin_capability_get
__rte_experimental int rte_eth_dev_hairpin_capability_get(uint16_t port_id, struct rte_eth_hairpin_cap *cap)
rte_eth_ctrl.h
rte_devargs.h
rte_eth_stats_get
int rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
rte_eth_vmdq_dcb_conf::nb_pool_maps
uint8_t nb_pool_maps
Definition: rte_ethdev.h:909
rte_eth_mirror_conf::rule_type
uint8_t rule_type
Definition: rte_ethdev.h:831
rte_eth_dev_rss_reta_update
int rte_eth_dev_rss_reta_update(uint16_t port_id, struct rte_eth_rss_reta_entry64 *reta_conf, uint16_t reta_size)
RTE_FDIR_REPORT_STATUS
@ RTE_FDIR_REPORT_STATUS
Definition: rte_ethdev.h:1243
rte_eth_tx_burst
static uint16_t rte_eth_tx_burst(uint16_t port_id, uint16_t queue_id, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
Definition: rte_ethdev.h:5120
rte_eth_set_queue_rate_limit
int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx, uint16_t tx_rate)
rte_eth_dev_info::rx_desc_lim
struct rte_eth_desc_lim rx_desc_lim
Definition: rte_ethdev.h:1542
rte_eth_txmode::reserved_64s
uint64_t reserved_64s[2]
Definition: rte_ethdev.h:970
RTE_ETH_EVENT_INTR_LSC
@ RTE_ETH_EVENT_INTR_LSC
Definition: rte_ethdev.h:3459
rte_eth_event_type
rte_eth_event_type
Definition: rte_ethdev.h:3457
rte_fdir_status_mode
rte_fdir_status_mode
Definition: rte_ethdev.h:1241
rte_eth_mirror_conf::dst_pool
uint8_t dst_pool
Definition: rte_ethdev.h:832
rte_eth_dev_rx_intr_ctl_q
int rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id, int epfd, int op, void *data)
rte_eth_tx_done_cleanup
int rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
rte_eth_desc_lim::nb_max
uint16_t nb_max
Definition: rte_ethdev.h:1147
rte_eth_promiscuous_disable
int rte_eth_promiscuous_disable(uint16_t port_id)
ETH_MQ_RX_RSS_FLAG
#define ETH_MQ_RX_RSS_FLAG
Definition: rte_ethdev.h:342
rte_eth_burst_mode
Definition: rte_ethdev.h:1598
rte_eth_event_ipsec_desc::metadata
uint64_t metadata
Definition: rte_ethdev.h:3438
rte_eth_rxseg
Definition: rte_ethdev.h:1023
rte_eth_dev_rss_hash_conf_get
int rte_eth_dev_rss_hash_conf_get(uint16_t port_id, struct rte_eth_rss_conf *rss_conf)
rte_eth_desc_lim::nb_mtu_seg_max
uint16_t nb_mtu_seg_max
Definition: rte_ethdev.h:1172
rte_eth_rxseg_capa::offset_allowed
uint32_t offset_allowed
Definition: rte_ethdev.h:1489
rte_eth_xstats_get_names
int rte_eth_xstats_get_names(uint16_t port_id, struct rte_eth_xstat_name *xstats_names, unsigned int size)
rte_vlan_filter_conf
Definition: rte_ethdev.h:433
rte_eth_udp_tunnel::prot_type
uint8_t prot_type
Definition: rte_ethdev.h:1273
rte_eth_hairpin_cap::max_nb_desc
uint16_t max_nb_desc
Definition: rte_ethdev.h:1091
rte_eth_hairpin_peer
Definition: rte_ethdev.h:1102
rte_eth_txconf::offloads
uint64_t offloads
Definition: rte_ethdev.h:1072
rte_eth_hairpin_cap::max_nb_queues
uint16_t max_nb_queues
Definition: rte_ethdev.h:1086
rte_eth_timesync_write_time
int rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *time)
rte_eth_conf::link_speeds
uint32_t link_speeds
Definition: rte_ethdev.h:1294
rte_eth_fdir_masks
Definition: rte_eth_ctrl.h:355
rte_eth_rx_queue_info_get
int rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id, struct rte_eth_rxq_info *qinfo)
rte_eth_rss_conf::rss_hf
uint64_t rss_hf
Definition: rte_ethdev.h:457
rte_eth_hairpin_peer::queue
uint16_t queue
Definition: rte_ethdev.h:1104
RTE_ETH_FEC_AUTO
@ RTE_ETH_FEC_AUTO
Definition: rte_ethdev.h:1678
rte_eth_vlan_mirror
Definition: rte_ethdev.h:821
RTE_ETH_EVENT_MACSEC
@ RTE_ETH_EVENT_MACSEC
Definition: rte_ethdev.h:3465
rte_eth_dev_flow_ctrl_set
int rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
rte_eth_vmdq_dcb_conf
Definition: rte_ethdev.h:905
rte_eth_stats_reset
int rte_eth_stats_reset(uint16_t port_id)
rte_eth_dev_owner_get
__rte_experimental int rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
rte_eth_dev_start
int rte_eth_dev_start(uint16_t port_id)
rte_eth_vmdq_rx_conf::default_pool
uint8_t default_pool
Definition: rte_ethdev.h:939
rte_eth_dev_rx_queue_start
int rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
RTE_ETH_EVENT_IPSEC_SA_BYTE_EXPIRY
@ RTE_ETH_EVENT_IPSEC_SA_BYTE_EXPIRY
Definition: rte_ethdev.h:3425
__rte_aligned
__extension__ struct rte_eth_link __rte_aligned(8)
rte_eth_rx_hairpin_queue_setup
__rte_experimental int rte_eth_rx_hairpin_queue_setup(uint16_t port_id, uint16_t rx_queue_id, uint16_t nb_rx_desc, const struct rte_eth_hairpin_conf *conf)
RTE_ETH_FEC_NOFEC
@ RTE_ETH_FEC_NOFEC
Definition: rte_ethdev.h:1677
rte_eth_link_speed_to_str
const __rte_experimental char * rte_eth_link_speed_to_str(uint32_t link_speed)
rte_eth_dev_get_name_by_port
int rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
rte_fdir_mode
rte_fdir_mode
Definition: rte_eth_ctrl.h:425
rte_eth_rxconf::offloads
uint64_t offloads
Definition: rte_ethdev.h:1043
rte_eth_dev_set_rx_queue_stats_mapping
int rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id, uint8_t stat_idx)
rte_eth_dev_priority_flow_ctrl_set
int rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id, struct rte_eth_pfc_conf *pfc_conf)
rte_eth_rxconf::rx_free_thresh
uint16_t rx_free_thresh
Definition: rte_ethdev.h:1034
rte_eth_tx_buffer_flush
static uint16_t rte_eth_tx_buffer_flush(uint16_t port_id, uint16_t queue_id, struct rte_eth_dev_tx_buffer *buffer)
Definition: rte_ethdev.h:5292
rte_eth_dev_uc_hash_table_set
int rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr, uint8_t on)
rte_eth_find_next_owned_by
uint64_t rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
rte_eth_stats::q_errors
uint64_t q_errors[RTE_ETHDEV_QUEUE_STAT_CNTRS]
Definition: rte_ethdev.h:265
RTE_ETH_DEV_ATTACHED
@ RTE_ETH_DEV_ATTACHED
Definition: rte_ethdev.h:1781
rte_eth_txconf::tx_free_thresh
uint16_t tx_free_thresh
Definition: rte_ethdev.h:1063
rte_common.h
rte_eth_desc_lim::nb_min
uint16_t nb_min
Definition: rte_ethdev.h:1148
rte_eth_switch_info::domain_id
uint16_t domain_id
Definition: rte_ethdev.h:1469
rte_eth_dev_set_ptypes
__rte_experimental int rte_eth_dev_set_ptypes(uint16_t port_id, uint32_t ptype_mask, uint32_t *set_ptypes, unsigned int num)
rte_eth_dev_callback_register
int rte_eth_dev_callback_register(uint16_t port_id, enum rte_eth_event_type event, rte_eth_dev_cb_fn cb_fn, void *cb_arg)
rte_ethdev_trace_fp.h
rte_eth_hairpin_bind
__rte_experimental int rte_eth_hairpin_bind(uint16_t tx_port, uint16_t rx_port)
rte_eth_udp_tunnel
Definition: rte_ethdev.h:1271
rte_eth_dev_owner_new
__rte_experimental int rte_eth_dev_owner_new(uint64_t *owner_id)
rte_eth_txmode::offloads
uint64_t offloads
Definition: rte_ethdev.h:959
rte_intr_conf::rxq
uint32_t rxq
Definition: rte_ethdev.h:1283
ETH_MQ_TX_VMDQ_ONLY
@ ETH_MQ_TX_VMDQ_ONLY
Definition: rte_ethdev.h:387
rte_eth_desc_lim::nb_align
uint16_t nb_align
Definition: rte_ethdev.h:1149
rte_eth_fc_conf::mode
enum rte_eth_fc_mode mode
Definition: rte_ethdev.h:1195
rte_eth_conf::lpbk_mode
uint32_t lpbk_mode
Definition: rte_ethdev.h:1303
rte_eth_dev_module_info
Definition: rte_dev_info.h:38
rte_eth_dev_info::rx_queue_offload_capa
uint64_t rx_queue_offload_capa
Definition: rte_ethdev.h:1528
rte_eth_dev_info::reta_size
uint16_t reta_size
Definition: rte_ethdev.h:1532
rte_eth_dev_count_avail
uint16_t rte_eth_dev_count_avail(void)
rte_eth_vmdq_rx_conf
Definition: rte_ethdev.h:936
RTE_ETH_EVENT_VF_MBOX
@ RTE_ETH_EVENT_VF_MBOX
Definition: rte_ethdev.h:3464
ETH_4_TCS
@ ETH_4_TCS
Definition: rte_ethdev.h:856
rte_eth_dev_info::default_txportconf
struct rte_eth_dev_portconf default_txportconf
Definition: rte_ethdev.h:1551
rte_eth_dev_info::default_rxportconf
struct rte_eth_dev_portconf default_rxportconf
Definition: rte_ethdev.h:1549
rte_eth_tx_hairpin_queue_setup
__rte_experimental int rte_eth_tx_hairpin_queue_setup(uint16_t port_id, uint16_t tx_queue_id, uint16_t nb_tx_desc, const struct rte_eth_hairpin_conf *conf)
rte_eth_timesync_read_time
int rte_eth_timesync_read_time(uint16_t port_id, struct timespec *time)
rte_eth_fec_set
__rte_experimental int rte_eth_fec_set(uint16_t port_id, uint32_t fec_capa)
__rte_unused
#define __rte_unused
Definition: rte_common.h:116
rte_eth_tx_buffer_set_err_callback
int rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer, buffer_tx_error_fn callback, void *userdata)
rte_eth_rxmode::offloads
uint64_t offloads
Definition: rte_ethdev.h:412
rte_eth_switch_info
Definition: rte_ethdev.h:1467
RTE_ETH_FEC_RS
@ RTE_ETH_FEC_RS
Definition: rte_ethdev.h:1680
rte_eth_hairpin_conf::peer_count
uint32_t peer_count
Definition: rte_ethdev.h:1114
rte_eth_timesync_disable
int rte_eth_timesync_disable(uint16_t port_id)
rte_eth_find_next
uint16_t rte_eth_find_next(uint16_t port_id)
rte_eth_dev_count_total
uint16_t rte_eth_dev_count_total(void)
rte_intr_conf::lsc
uint32_t lsc
Definition: rte_ethdev.h:1281
rte_eth_dev_is_removed
__rte_experimental int rte_eth_dev_is_removed(uint16_t port_id)
rte_mempool
Definition: rte_mempool.h:208
ETH_8_POOLS
@ ETH_8_POOLS
Definition: rte_ethdev.h:865
rte_eth_burst_mode::flags
uint64_t flags
Definition: rte_ethdev.h:1599
RTE_ETH_EVENT_MAX
@ RTE_ETH_EVENT_MAX
Definition: rte_ethdev.h:3471
rte_eth_add_rx_callback
const struct rte_eth_rxtx_callback * rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id, rte_rx_callback_fn fn, void *user_param)
rte_eth_fec_get_capability
__rte_experimental int rte_eth_fec_get_capability(uint16_t port_id, struct rte_eth_fec_capa *speed_fec_capa, unsigned int num)
ETH_MQ_RX_VMDQ_ONLY
@ ETH_MQ_RX_VMDQ_ONLY
Definition: rte_ethdev.h:362
RTE_FDIR_PBALLOC_64K
@ RTE_FDIR_PBALLOC_64K
Definition: rte_ethdev.h:1233
rte_fdir_pballoc_type
rte_fdir_pballoc_type
Definition: rte_ethdev.h:1232
rte_eth_rss_hf_refine
static uint64_t rte_eth_rss_hf_refine(uint64_t rss_hf)
Definition: rte_ethdev.h:600
rte_eth_conf::dcb_tx_conf
struct rte_eth_dcb_tx_conf dcb_tx_conf
Definition: rte_ethdev.h:1320
rte_fdir_conf::status
enum rte_fdir_status_mode status
Definition: rte_ethdev.h:1256
rte_eth_dev_info::max_mtu
uint16_t max_mtu
Definition: rte_ethdev.h:1510
rte_eth_hairpin_cap::max_tx_2_rx
uint16_t max_tx_2_rx
Definition: rte_ethdev.h:1090
ETH_MQ_TX_DCB
@ ETH_MQ_TX_DCB
Definition: rte_ethdev.h:385
rte_eth_dev_set_vlan_pvid
int rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
rte_eth_rx_mq_mode
rte_eth_rx_mq_mode
Definition: rte_ethdev.h:350
ETH_VLAN_TYPE_INNER
@ ETH_VLAN_TYPE_INNER
Definition: rte_ethdev.h:424
rte_eth_rxseg_capa::reserved
uint16_t reserved
Definition: rte_ethdev.h:1492
RTE_ETH_EVENT_FLOW_AGED
@ RTE_ETH_EVENT_FLOW_AGED
Definition: rte_ethdev.h:3470
rte_eth_stats::imissed
uint64_t imissed
Definition: rte_ethdev.h:249
rte_eth_hairpin_conf::tx_explicit
uint32_t tx_explicit
Definition: rte_ethdev.h:1125
RTE_ETH_EVENT_NEW
@ RTE_ETH_EVENT_NEW
Definition: rte_ethdev.h:3467
rte_eth_txmode::hw_vlan_insert_pvid
__extension__ uint8_t hw_vlan_insert_pvid
Definition: rte_ethdev.h:967
rte_eth_dev_info::flow_type_rss_offloads
uint64_t flow_type_rss_offloads
Definition: rte_ethdev.h:1536
RTE_ETH_EVENT_QUEUE_STATE
@ RTE_ETH_EVENT_QUEUE_STATE
Definition: rte_ethdev.h:3460
rte_eth_rxconf::reserved_64s
uint64_t reserved_64s[2]
Definition: rte_ethdev.h:1053
rte_eth_conf::dcb_rx_conf
struct rte_eth_dcb_rx_conf dcb_rx_conf
Definition: rte_ethdev.h:1312
rte_eth_fc_conf::send_xon
uint16_t send_xon
Definition: rte_ethdev.h:1194
rte_eth_dev_tx_offload_name
const char * rte_eth_dev_tx_offload_name(uint64_t offload)
rte_eth_dev_get_eeprom_length
int rte_eth_dev_get_eeprom_length(uint16_t port_id)
ETH_VLAN_TYPE_OUTER
@ ETH_VLAN_TYPE_OUTER
Definition: rte_ethdev.h:425
rte_eth_rx_queue_setup
int rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id, uint16_t nb_rx_desc, unsigned int socket_id, const struct rte_eth_rxconf *rx_conf, struct rte_mempool *mb_pool)
rte_eth_conf::rss_conf
struct rte_eth_rss_conf rss_conf
Definition: rte_ethdev.h:1309
rte_eth_desc_lim
Definition: rte_ethdev.h:1146
rte_eth_link_get
int rte_eth_link_get(uint16_t port_id, struct rte_eth_link *link)
rte_eth_remove_tx_callback
int rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id, const struct rte_eth_rxtx_callback *user_cb)
rte_eth_xstats_get_names_by_id
int rte_eth_xstats_get_names_by_id(uint16_t port_id, struct rte_eth_xstat_name *xstats_names, unsigned int size, uint64_t *ids)
ETH_64_POOLS
@ ETH_64_POOLS
Definition: rte_ethdev.h:868
rte_eth_dev_get_mtu
int rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
RTE_FC_FULL
@ RTE_FC_FULL
Definition: rte_ethdev.h:1182
rte_eth_rxmode
Definition: rte_ethdev.h:400
rte_eth_dev_rx_intr_enable
int rte_eth_dev_rx_intr_enable(uint16_t port_id, uint16_t queue_id)
ETH_MQ_TX_VMDQ_DCB
@ ETH_MQ_TX_VMDQ_DCB
Definition: rte_ethdev.h:386
rte_eth_conf::rx_adv_conf
struct rte_eth_conf::@153 rx_adv_conf
RTE_ETH_EVENT_IPSEC_ESN_OVERFLOW
@ RTE_ETH_EVENT_IPSEC_ESN_OVERFLOW
Definition: rte_ethdev.h:3421
rte_eth_iterator_next
uint16_t rte_eth_iterator_next(struct rte_dev_iterator *iter)
rte_eth_timesync_adjust_time
int rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
rte_eth_vmdq_dcb_conf::enable_default_pool
uint8_t enable_default_pool
Definition: rte_ethdev.h:907
rte_eth_tx_buffer_drop_callback
void rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent, void *userdata)
rte_eth_dev_get_module_eeprom
__rte_experimental int rte_eth_dev_get_module_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
rte_eth_dev_info::default_rxconf
struct rte_eth_rxconf default_rxconf
Definition: rte_ethdev.h:1537
rte_eth_vmdq_rx_conf::pool_map
struct rte_eth_vmdq_rx_conf::@152 pool_map[ETH_VMDQ_MAX_VLAN_FILTERS]
rte_eth_vmdq_dcb_conf::nb_queue_pools
enum rte_eth_nb_pools nb_queue_pools
Definition: rte_ethdev.h:906
rte_eth_vmdq_rx_conf::rx_mode
uint32_t rx_mode
Definition: rte_ethdev.h:942
rte_ethdev_core.h
rte_eth_find_next_sibling
__rte_experimental uint16_t rte_eth_find_next_sibling(uint16_t port_id_start, uint16_t ref_port_id)
rte_eth_dev_info::vmdq_queue_num
uint16_t vmdq_queue_num
Definition: rte_ethdev.h:1540
rte_eth_vmdq_dcb_conf::pool_map
struct rte_eth_vmdq_dcb_conf::@151 pool_map[ETH_VMDQ_MAX_VLAN_FILTERS]
rte_eth_txmode::hw_vlan_reject_untagged
__extension__ uint8_t hw_vlan_reject_untagged
Definition: rte_ethdev.h:966
rte_eth_conf::vmdq_dcb_conf
struct rte_eth_vmdq_dcb_conf vmdq_dcb_conf
Definition: rte_ethdev.h:1310
rte_eth_txconf::reserved_64s
uint64_t reserved_64s[2]
Definition: rte_ethdev.h:1074
rte_eth_dev_stop
int rte_eth_dev_stop(uint16_t port_id)
rte_eth_rx_descriptor_done
static __rte_deprecated int rte_eth_rx_descriptor_done(uint16_t port_id, uint16_t queue_id, uint16_t offset)
Definition: rte_ethdev.h:4930
rte_eth_rxseg_split::reserved
uint32_t reserved
Definition: rte_ethdev.h:1014
rte_eth_dev_pool_ops_supported
int rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
RTE_FDIR_NO_REPORT_STATUS
@ RTE_FDIR_NO_REPORT_STATUS
Definition: rte_ethdev.h:1242
rte_eth_allmulticast_get
int rte_eth_allmulticast_get(uint16_t port_id)
rte_eth_hairpin_conf::manual_bind
uint32_t manual_bind
Definition: rte_ethdev.h:1138
rte_eth_mirror_rule_set
int rte_eth_mirror_rule_set(uint16_t port_id, struct rte_eth_mirror_conf *mirror_conf, uint8_t rule_id, uint8_t on)
rte_eth_nb_pools
rte_eth_nb_pools
Definition: rte_ethdev.h:864
RTE_FC_NONE
@ RTE_FC_NONE
Definition: rte_ethdev.h:1179
rte_eth_stats::q_obytes
uint64_t q_obytes[RTE_ETHDEV_QUEUE_STAT_CNTRS]
Definition: rte_ethdev.h:263
rte_eth_dev_get_module_info
__rte_experimental int rte_eth_dev_get_module_info(uint16_t port_id, struct rte_eth_dev_module_info *modinfo)
rte_eth_dev_info::hash_key_size
uint8_t hash_key_size
Definition: rte_ethdev.h:1534
rte_eth_dev_mac_addr_add
int rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *mac_addr, uint32_t pool)
rte_eth_dev_info::max_vmdq_pools
uint16_t max_vmdq_pools
Definition: rte_ethdev.h:1522
rte_eth_fdir_flex_conf
Definition: rte_eth_ctrl.h:413
rte_eth_dev_info::min_rx_bufsize
uint32_t min_rx_bufsize
Definition: rte_ethdev.h:1512
rte_eth_fc_conf
Definition: rte_ethdev.h:1190
rte_eth_vmdq_rx_conf::vlan_id
uint16_t vlan_id
Definition: rte_ethdev.h:944
rte_eth_stats::opackets
uint64_t opackets
Definition: rte_ethdev.h:246
rte_eth_dev_set_vlan_strip_on_queue
int rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id, int on)
rte_eth_dev_reset
int rte_eth_dev_reset(uint16_t port_id)
rte_eth_tx_buffer_count_callback
void rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent, void *userdata)
rte_eth_rss_conf
Definition: rte_ethdev.h:454
rte_eth_tx_burst_mode_get
__rte_experimental int rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id, struct rte_eth_burst_mode *mode)
rte_eth_conf::txmode
struct rte_eth_txmode txmode
Definition: rte_ethdev.h:1302
rte_eth_hairpin_conf::reserved
uint32_t reserved
Definition: rte_ethdev.h:1139
rte_eth_fc_conf::low_water
uint32_t low_water
Definition: rte_ethdev.h:1192
rte_eth_rxq_info::mp
struct rte_mempool * mp
Definition: rte_ethdev.h:1569
ETH_MQ_RX_VMDQ_DCB
@ ETH_MQ_RX_VMDQ_DCB
Definition: rte_ethdev.h:366
rte_eth_conf::dcb_capability_en
uint32_t dcb_capability_en
Definition: rte_ethdev.h:1327
RTE_ETH_EVENT_IPSEC_MAX
@ RTE_ETH_EVENT_IPSEC_MAX
Definition: rte_ethdev.h:3427
rte_eth_dev_info::max_rx_pktlen
uint32_t max_rx_pktlen
Definition: rte_ethdev.h:1513
rte_tx_callback_fn
uint16_t(* rte_tx_callback_fn)(uint16_t port_id, uint16_t queue, struct rte_mbuf *pkts[], uint16_t nb_pkts, void *user_param)
Definition: rte_ethdev.h:1771
rte_eth_dev_info::if_index
unsigned int if_index
Definition: rte_ethdev.h:1507
rte_eth_dev_set_vlan_ether_type
int rte_eth_dev_set_vlan_ether_type(uint16_t port_id, enum rte_vlan_type vlan_type, uint16_t tag_type)
rte_eth_txmode
Definition: rte_ethdev.h:952
rte_eth_stats::q_ibytes
uint64_t q_ibytes[RTE_ETHDEV_QUEUE_STAT_CNTRS]
Definition: rte_ethdev.h:261
rte_eth_rss_conf::rss_key
uint8_t * rss_key
Definition: rte_ethdev.h:455
rte_eth_dev_info::default_txconf
struct rte_eth_txconf default_txconf
Definition: rte_ethdev.h:1538
rte_eth_dev_default_mac_addr_set
int rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct rte_ether_addr *mac_addr)
RTE_ETH_DEV_REMOVED
@ RTE_ETH_DEV_REMOVED
Definition: rte_ethdev.h:1783
RTE_ETH_EVENT_IPSEC_UNKNOWN
@ RTE_ETH_EVENT_IPSEC_UNKNOWN
Definition: rte_ethdev.h:3419
rte_eth_rxconf::rx_seg
union rte_eth_rxseg * rx_seg
Definition: rte_ethdev.h:1051
rte_eth_txq_info::nb_desc
uint16_t nb_desc
Definition: rte_ethdev.h:1582
RTE_FC_TX_PAUSE
@ RTE_FC_TX_PAUSE
Definition: rte_ethdev.h:1181
rte_eth_dev_callback_unregister
int rte_eth_dev_callback_unregister(uint16_t port_id, enum rte_eth_event_type event, rte_eth_dev_cb_fn cb_fn, void *cb_arg)
rte_eth_dev_portconf
Definition: rte_ethdev.h:1452
rte_eth_dev_info::tx_offload_capa
uint64_t tx_offload_capa
Definition: rte_ethdev.h:1526
rte_eth_dev_set_link_up
int rte_eth_dev_set_link_up(uint16_t port_id)
rte_eth_rxq_info::nb_desc
uint16_t nb_desc
Definition: rte_ethdev.h:1572
rte_eth_dev_tx_queue_start
int rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
rte_eth_dev_info
Definition: rte_ethdev.h:1504
rte_eth_dev_owner_delete
__rte_experimental int rte_eth_dev_owner_delete(const uint64_t owner_id)
rte_eth_dev_info::nb_tx_queues
uint16_t nb_tx_queues
Definition: rte_ethdev.h:1547
rte_eth_rxseg_capa::multi_pools
__extension__ uint32_t multi_pools
Definition: rte_ethdev.h:1488
rte_eth_conf::vmdq_dcb_tx_conf
struct rte_eth_vmdq_dcb_tx_conf vmdq_dcb_tx_conf
Definition: rte_ethdev.h:1318
rte_eth_stats::ibytes
uint64_t ibytes
Definition: rte_ethdev.h:247
rte_ether_addr
Definition: rte_ether.h:64
rte_eth_txconf::tx_deferred_start
uint8_t tx_deferred_start
Definition: rte_ethdev.h:1066
rte_eth_txq_info::conf
struct rte_eth_txconf conf
Definition: rte_ethdev.h:1581
rte_eth_conf
Definition: rte_ethdev.h:1293
rte_eth_dev_socket_id
int rte_eth_dev_socket_id(uint16_t port_id)
rte_eth_stats::oerrors
uint64_t oerrors
Definition: rte_ethdev.h:254
rte_device
Definition: rte_dev.h:92
rte_eth_tx_buffer
static __rte_always_inline uint16_t rte_eth_tx_buffer(uint16_t port_id, uint16_t queue_id, struct rte_eth_dev_tx_buffer *buffer, struct rte_mbuf *tx_pkt)
Definition: rte_ethdev.h:5345
rte_eth_vmdq_rx_conf::pools
uint64_t pools
Definition: rte_ethdev.h:945
ETH_32_POOLS
@ ETH_32_POOLS
Definition: rte_ethdev.h:867
rte_eth_stats
Definition: rte_ethdev.h:244
rte_eth_mirror_conf
Definition: rte_ethdev.h:830
rte_eth_burst_mode::info
char info[RTE_ETH_BURST_MODE_INFO_SIZE]
Definition: rte_ethdev.h:1602
rte_eth_dev_get_port_by_name
int rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
rte_eth_xstat_name
Definition: rte_ethdev.h:1636
rte_eth_xstat
Definition: rte_ethdev.h:1617
rte_eth_dev_udp_tunnel_port_add
int rte_eth_dev_udp_tunnel_port_add(uint16_t port_id, struct rte_eth_udp_tunnel *tunnel_udp)
rte_eth_dev_info::max_vfs
uint16_t max_vfs
Definition: rte_ethdev.h:1521
rte_eth_dev_info::rx_seg_capa
struct rte_eth_rxseg_capa rx_seg_capa
Definition: rte_ethdev.h:1523
rte_eth_stats::q_ipackets
uint64_t q_ipackets[RTE_ETHDEV_QUEUE_STAT_CNTRS]
Definition: rte_ethdev.h:257
rte_eth_rxseg_split
Definition: rte_ethdev.h:1010
rte_eth_fc_mode
rte_eth_fc_mode
Definition: rte_ethdev.h:1178
rte_eth_hairpin_get_peer_ports
__rte_experimental int rte_eth_hairpin_get_peer_ports(uint16_t port_id, uint16_t *peer_ports, size_t len, uint32_t direction)
rte_eth_rss_reta_entry64::mask
uint64_t mask
Definition: rte_ethdev.h:845
rte_eth_tunnel_type
rte_eth_tunnel_type
Definition: rte_ethdev.h:1213
rte_eth_read_clock
__rte_experimental int rte_eth_read_clock(uint16_t port_id, uint64_t *clock)
rte_eth_rxq_info::scattered_rx
uint8_t scattered_rx
Definition: rte_ethdev.h:1571
ETH_MQ_RX_RSS
@ ETH_MQ_RX_RSS
Definition: rte_ethdev.h:355
rte_eth_dev_uc_all_hash_table_set
int rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
__rte_cache_min_aligned
#define __rte_cache_min_aligned
Definition: rte_common.h:403
rte_eth_dev_info::max_tx_queues
uint16_t max_tx_queues
Definition: rte_ethdev.h:1517
ETH_8_TCS
@ ETH_8_TCS
Definition: rte_ethdev.h:857
rte_eth_conf::fdir_conf
struct rte_fdir_conf fdir_conf
Definition: rte_ethdev.h:1328
rte_vlan_type
rte_vlan_type
Definition: rte_ethdev.h:422
rte_eth_rxconf::rx_thresh
struct rte_eth_thresh rx_thresh
Definition: rte_ethdev.h:1033
rte_eth_add_first_rx_callback
const struct rte_eth_rxtx_callback * rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id, rte_rx_callback_fn fn, void *user_param)
rte_eth_dev_get_supported_ptypes
int rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask, uint32_t *ptypes, int num)
rte_eth_rxconf::reserved_ptrs
void * reserved_ptrs[2]
Definition: rte_ethdev.h:1054
RTE_ETH_EVENT_INTR_RMV
@ RTE_ETH_EVENT_INTR_RMV
Definition: rte_ethdev.h:3466
rte_eth_rxq_info::conf
struct rte_eth_rxconf conf
Definition: rte_ethdev.h:1570
rte_eth_hairpin_cap
Definition: rte_ethdev.h:1084
rte_eth_xstats_get_by_id
int rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids, uint64_t *values, unsigned int size)
rte_eth_vmdq_dcb_conf::dcb_tc
uint8_t dcb_tc[ETH_DCB_NUM_USER_PRIORITIES]
Definition: rte_ethdev.h:914
rte_eth_rxconf::rx_drop_en
uint8_t rx_drop_en
Definition: rte_ethdev.h:1035
rte_eth_thresh::wthresh
uint8_t wthresh
Definition: rte_ethdev.h:336
rte_eth_mirror_conf::vlan
struct rte_eth_vlan_mirror vlan
Definition: rte_ethdev.h:835
rte_errno
#define rte_errno
Definition: rte_errno.h:29
rte_eth_mirror_conf::pool_mask
uint64_t pool_mask
Definition: rte_ethdev.h:833
rte_eth_rxmode::max_lro_pkt_size
uint32_t max_lro_pkt_size
Definition: rte_ethdev.h:405
rte_eth_txconf::tx_rs_thresh
uint16_t tx_rs_thresh
Definition: rte_ethdev.h:1062
rte_eth_timesync_enable
int rte_eth_timesync_enable(uint16_t port_id)
rte_dev.h
ETH_MQ_RX_DCB_RSS
@ ETH_MQ_RX_DCB_RSS
Definition: rte_ethdev.h:359
rte_eth_dev_close
int rte_eth_dev_close(uint16_t port_id)
rte_eth_dev_info::max_mac_addrs
uint32_t max_mac_addrs
Definition: rte_ethdev.h:1518
rte_eth_stats::q_opackets
uint64_t q_opackets[RTE_ETHDEV_QUEUE_STAT_CNTRS]
Definition: rte_ethdev.h:259
rte_eth_dev_set_link_down
int rte_eth_dev_set_link_down(uint16_t port_id)
rte_eth_rxmode::reserved_ptrs
void * reserved_ptrs[2]
Definition: rte_ethdev.h:415
rte_eth_conf::vmdq_rx_conf
struct rte_eth_vmdq_rx_conf vmdq_rx_conf
Definition: rte_ethdev.h:1314
rte_eth_event_ipsec_subtype
rte_eth_event_ipsec_subtype
Definition: rte_ethdev.h:3418
rte_eth_txconf::reserved_ptrs
void * reserved_ptrs[2]
Definition: rte_ethdev.h:1075
rte_eth_dev_info::reserved_ptrs
void * reserved_ptrs[2]
Definition: rte_ethdev.h:1561
rte_eth_dev_rss_reta_query
int rte_eth_dev_rss_reta_query(uint16_t port_id, struct rte_eth_rss_reta_entry64 *reta_conf, uint16_t reta_size)
rte_eth_pfc_conf::priority
uint8_t priority
Definition: rte_ethdev.h:1207
rte_eth_switch_info::name
const char * name
Definition: rte_ethdev.h:1468